diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c
index 5e0d6871e2..a7ce2f8de5 100644
--- a/src/soc/intel/skylake/romstage/romstage.c
+++ b/src/soc/intel/skylake/romstage/romstage.c
@@ -173,6 +173,7 @@ static void soc_peg_init_params(FSP_M_CONFIG *m_cfg,
 	dev = pcidev_path_on_root(SA_DEVFN_PEG0); /* PEG 0:1:0 */
 	m_cfg->Peg0Enable = dev && dev->enabled;
 	if (m_cfg->Peg0Enable) {
+		m_cfg->Peg0Enable = 2;
 		m_cfg->Peg0MaxLinkWidth = config->Peg0MaxLinkWidth;
 		/* Use maximum possible link speed */
 		m_cfg->Peg0MaxLinkSpeed = 0;
@@ -186,6 +187,7 @@ static void soc_peg_init_params(FSP_M_CONFIG *m_cfg,
 	dev = pcidev_path_on_root(SA_DEVFN_PEG1); /* PEG 0:1:1 */
 	m_cfg->Peg1Enable = dev && dev->enabled;
 	if (m_cfg->Peg1Enable) {
+		m_cfg->Peg1Enable = 2;
 		m_cfg->Peg1MaxLinkWidth = config->Peg1MaxLinkWidth;
 		m_cfg->Peg1MaxLinkSpeed = 0;
 		m_cfg->Peg1PowerDownUnusedLanes = 1;
@@ -196,6 +198,7 @@ static void soc_peg_init_params(FSP_M_CONFIG *m_cfg,
 	dev = pcidev_path_on_root(SA_DEVFN_PEG2); /* PEG 0:1:2 */
 	m_cfg->Peg2Enable = dev && dev->enabled;
 	if (m_cfg->Peg2Enable) {
+		m_cfg->Peg2Enable = 2;
 		m_cfg->Peg2MaxLinkWidth = config->Peg2MaxLinkWidth;
 		m_cfg->Peg2MaxLinkSpeed = 0;
 		m_cfg->Peg2PowerDownUnusedLanes = 1;