soc/amd/mendocino: Update XHCI GPE to use constant
The GPE number used for XHCI has now been defined in AMD's common code in CB:67936. Change over existing code to use this new definition. BUG=b:186792595 TEST=Ran on skyrim device and verified XHCI GPE setting. Signed-off-by: Robert Zieba <robertzieba@google.com> Change-Id: I3bfc2256ea2ca851afe88f2cdb419f39eee76fdd Reviewed-on: https://review.coreboot.org/c/coreboot/+/69916 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -4,6 +4,7 @@
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#include <amdblocks/gpio.h>
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#include <amdblocks/smi.h>
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#include <amdblocks/xhci.h>
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#include <bootstate.h>
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#include <device/device.h>
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#include <device/pci_ids.h>
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@ -14,19 +15,19 @@
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static const struct sci_source xhci_sci_sources[] = {
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{
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.scimap = SMITYPE_XHC0_PME,
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.gpe = GEVENT_31,
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.gpe = XHCI_GEVENT,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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},
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{
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.scimap = SMITYPE_XHC1_PME,
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.gpe = GEVENT_31,
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.gpe = XHCI_GEVENT,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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},
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{
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.scimap = SMITYPE_XHC2_PME,
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.gpe = GEVENT_31,
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.gpe = XHCI_GEVENT,
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.direction = SMI_SCI_LVL_HIGH,
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.level = SMI_SCI_EDG
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}
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