GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common/block/lpc: Don't disable the HOG bit 

According to the AMD FCH architects, we should be using the default
value for the NO_HOG bit. This fixes a problem where the SPI DMA no
longer functions after the LPC init runs.

BUG=b:179699789, b:192373221
TEST=Boot guybrush and see SPI DMA working

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: If015869657f36d3533f4ab9ebd1f54b0d4eb283a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56233
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Raul E Rangel 2021-07-02 17:08:41 -06:00 committed by Raul Rangel
parent 73e0f18b35
commit 8916a8d802
1 changed files with 0 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
src/soc/amd/common/block/lpc/lpc.c
View File

@ -61,12 +61,6 @@ static void lpc_init(struct device *dev)
/* BIT 1 is not defined in public datasheet. */ /* BIT 1 is not defined in public datasheet. */
byte &= ~(1 << 1); byte &= ~(1 << 1);
/*
* Keep the old way. i.e., when bus master/DMA cycle is going
* on on LPC, it holds PCI grant, so no LPC slave cycle can
* interrupt and visit LPC.
*/
byte &= ~LPC_NOHOG;
pci_write_config8(dev, LPC_MISC_CONTROL_BITS, byte); pci_write_config8(dev, LPC_MISC_CONTROL_BITS, byte);
/* /*