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flashrom: Fix ICH7 non-SPI that broke in r3393 

r3393 assumed that ICH7 always used SPI. This patch resets ich7_detected back
to 0 when BOOT BIOS Straps indicate something else than SPI.

Also fixes a build error in ichspi.c with gcc 4.2.2.

Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3395 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Peter Stuge 2008-06-29 01:30:41 +00:00
parent 50e4a095dd
commit 891f1a2650
2 changed files with 3 additions and 1 deletions
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2
util/flashrom/chipset_enable.c
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@ -212,6 +212,8 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, unsign
bbs = (gcs >> 10) & 0x3; bbs = (gcs >> 10) & 0x3;
printf_debug("BOOT BIOS Straps: 0x%x (%s)\n", bbs, printf_debug("BOOT BIOS Straps: 0x%x (%s)\n", bbs,
(bbs == 0x3) ? "LPC" : ((bbs == 0x2) ? "PCI" : "SPI")); (bbs == 0x3) ? "LPC" : ((bbs == 0x2) ? "PCI" : "SPI"));
if (bbs >= 2)
ich7_detected = 0;
buc = *(volatile uint8_t *)(rcrb + 0x3414); buc = *(volatile uint8_t *)(rcrb + 0x3414);
printf_debug("Top Swap : %s\n", (buc & 1)?"enabled (A16 inverted)":"not enabled"); printf_debug("Top Swap : %s\n", (buc & 1)?"enabled (A16 inverted)":"not enabled");

2
util/flashrom/ichspi.c
View File

@ -229,7 +229,7 @@ static int ich7_run_opcode(uint8_t nr, OPCODE op, uint32_t offset,
{ {
int write_cmd = 0; int write_cmd = 0;
int timeout; int timeout;
uint32_t temp32; uint32_t temp32 = 0;
uint16_t temp16; uint16_t temp16;
uint32_t a; uint32_t a;