Make all Kconfig enabled boards build (tested with kbuildall).
Also enable building individual boards with kbuildall for debugging. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4666 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -44,6 +44,14 @@ config PCI_BUS_SEGN_BITS
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bool
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default n
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x1
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x20
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config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
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hex
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default 0
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@ -20,6 +20,7 @@ config DCACHE_RAM_SIZE
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config SMP
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bool
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default y if MAX_CPUS != 1
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default n
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config CPU_SOCKET_TYPE
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hex
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@ -1 +1,2 @@
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source src/cpu/via/model_c3/Kconfig
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source src/cpu/via/model_c7/Kconfig
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@ -374,6 +374,7 @@ source "src/mainboard/iwill/Kconfig"
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source "src/mainboard/jetway/Kconfig"
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source "src/mainboard/kontron/Kconfig"
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source "src/mainboard/lippert/Kconfig"
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source "src/mainboard/mitac/Kconfig"
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source "src/mainboard/motorola/Kconfig"
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source "src/mainboard/msi/Kconfig"
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source "src/mainboard/nec/Kconfig"
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@ -382,6 +383,7 @@ source "src/mainboard/nvidia/Kconfig"
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source "src/mainboard/olpc/Kconfig"
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source "src/mainboard/pcengines/Kconfig"
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source "src/mainboard/rca/Kconfig"
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source "src/mainboard/soyo/Kconfig"
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source "src/mainboard/sunw/Kconfig"
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source "src/mainboard/supermicro/Kconfig"
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source "src/mainboard/technexion/Kconfig"
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@ -24,7 +24,7 @@ config BOARD_ASUS_MEW_VM
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select CPU_INTEL_SOCKET_PGA370
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select NORTHBRIDGE_INTEL_I82810
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select SOUTHBRIDGE_INTEL_I82801XX
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select SUPERIO_SMSC_SMSCSUPERIO
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select SUPERIO_SMSC_LPC47B272
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select HAVE_PIRQ_TABLE
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select UDELAY_IO
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select PCI_ROM_RUN
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@ -42,6 +42,11 @@ config MAINBOARD_PART_NUMBER
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default "MEW-VM"
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depends on BOARD_ASUS_MEW_VM
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config HAVE_OPTION_TABLE
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bool
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default n
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depends on BOARD_ASUS_MEW_VM
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config IRQ_SLOT_COUNT
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int
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default 11
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@ -24,7 +24,8 @@ config BOARD_COMPAQ_DESKPRO_EN_SFF_P600
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select CPU_INTEL_SLOT_2
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select NORTHBRIDGE_INTEL_I440BX
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select SOUTHBRIDGE_INTEL_I82371EB
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select SUPERIO_NSC_PC97307
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# should be SUPERIO_NSC_PC97307!
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select SUPERIO_NSC_PC97317
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select HAVE_PIRQ_TABLE
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select UDELAY_IO
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select PCI_ROM_RUN
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@ -2,24 +2,6 @@ choice
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prompt "Mainboard model"
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depends on VENDOR_EMULATION
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config BOARD_EMULATION_QEMU_X86
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bool "QEMU x86"
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select ARCH_X86
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select CPU_I586
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select SOUTHBRIDGE_INTEL_I82371EB
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select CPU_EMULATION_QEMU_X86
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select CONSOLE_SERIAL8250
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help
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x86 QEMU variant.
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source "src/mainboard/emulation/qemu-x86/Kconfig"
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endchoice
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config MAINBOARD_DIR
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string
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default emulation/qemu-x86
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depends on BOARD_EMULATION_QEMU_X86
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config MAINBOARD_PART_NUMBER
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string
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default "QEMU-86"
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depends on BOARD_EMULATION_QEMU_X86
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@ -0,0 +1,19 @@
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config BOARD_EMULATION_QEMU_X86
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bool "QEMU x86"
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select ARCH_X86
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select CPU_I586
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select SOUTHBRIDGE_INTEL_I82371EB
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select CPU_EMULATION_QEMU_X86
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select CONSOLE_SERIAL8250
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help
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x86 QEMU variant.
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config MAINBOARD_DIR
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string
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default emulation/qemu-x86
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depends on BOARD_EMULATION_QEMU_X86
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config MAINBOARD_PART_NUMBER
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string
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default "QEMU-86"
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depends on BOARD_EMULATION_QEMU_X86
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@ -0,0 +1,87 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2009 Michael Gold <mgold@ncf.ca>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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chip northbridge/intel/i82810 # Northbridge
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device apic_cluster 0 on # APIC cluster
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chip cpu/intel/socket_PGA370 # CPU
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device apic 0 on end # APIC
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end
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end
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device pci_domain 0 on # PCI domain
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device pci 0.0 on end # Graphics Memory Controller Hub (GMCH)
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chip drivers/pci/onboard
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device pci 1.0 on end
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register "rom_address" = "0xfff80000" # 512 KB image
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end
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chip southbridge/intel/i82801xx # Southbridge
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register "pirqa_routing" = "0x03"
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register "pirqb_routing" = "0x05"
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register "pirqc_routing" = "0x09"
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register "pirqd_routing" = "0x0b"
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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device pci 1e.0 on # PCI bridge
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device pci 5.0 on end # Audio controller (ESS ES1988)
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end
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device pci 1f.0 on # ISA bridge
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chip superio/smsc/smscsuperio # Super I/O (SMSC LPC47U332)
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device pnp 4e.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 4e.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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drq 0x74 = 3
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end
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device pnp 4e.4 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 4e.5 on # MIDI port (MPU-401)
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io 0x60 = 0x330
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irq 0x70 = 10
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end
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device pnp 4e.7 on # PS/2 keyboard / mouse
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io 0x60 = 0x60 # XXX: not relocatable
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io 0x62 = 0x64 # XXX: not relocatable
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irq 0x70 = 1 # PS/2 keyboard interrupt
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irq 0x72 = 12 # PS/2 mouse interrupt
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end
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device pnp 4e.9 on # Game port
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io 0x60 = 0x201
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end
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device pnp 4e.a on # Runtime registers
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io 0x60 = 0x400
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end
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device pnp 4e.b off end # SMBus
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end
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end
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device pci 1f.1 on end # IDE
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device pci 1f.2 on end # USB
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device pci 1f.3 on end # SMbus
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device pci 1f.5 off end # Audio controller
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device pci 1f.6 off end # Modem
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end
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end
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end
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@ -0,0 +1,73 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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chip northbridge/intel/i440bx # Northbridge
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device apic_cluster 0 on # APIC cluster
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chip cpu/intel/slot_2 # CPU (FIXME: It's slot 1, actually)
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device apic 0 on end # APIC
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end
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end
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device pci_domain 0 on # PCI domain
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device pci 0.0 on end # Host bridge
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device pci 1.0 on end # PCI/AGP bridge
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chip southbridge/intel/i82371eb # Southbridge
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device pci 7.0 on # ISA bridge
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chip superio/ite/it8671f # Super I/O
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device pnp 370.0 on # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 370.1 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 370.2 on # COM2
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 370.3 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 370.5 on # PS/2 keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end
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device pnp 370.6 on # PS/2 mouse
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irq 0x70 = 12
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end
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end
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end
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device pci 7.1 on end # IDE
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device pci 7.2 on end # USB
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device pci 7.3 on end # ACPI
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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register "ide_legacy_enable" = "1"
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# Enable UDMA/33 for higher speed if your IDE device(s) support it.
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register "ide0_drive0_udma33_enable" = "0"
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register "ide0_drive1_udma33_enable" = "0"
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register "ide1_drive0_udma33_enable" = "0"
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register "ide1_drive1_udma33_enable" = "0"
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end
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end
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end
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@ -35,3 +35,7 @@ config VIDEO_MB
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default 32
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depends on BOARD_VIA_EPIA_N
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config RAMBASE
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hex
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default 0x4000
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depends on BOARD_VIA_EPIA_N
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@ -30,3 +30,13 @@ config MAINBOARD_PART_NUMBER
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string
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default "VT8454C"
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depends on BOARD_VIA_VT8454C
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config IRQ_SLOT_COUNT
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int
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default 15
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depends on BOARD_VIA_VT8454C
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config RAMBASE
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hex
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default 0x4000
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depends on BOARD_VIA_VT8454C
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@ -1,3 +1,8 @@
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config NORTHBRIDGE_VIA_CN400
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bool
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default n
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config FALLBACK_SIZE
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int
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default 0
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depends on NORTHBRIDGE_VIA_CN400
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@ -19,5 +19,5 @@
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##
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#config chip.h
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obj-$(CONFIG_SUPERIO_SMSC_DEVICE) += superio.o
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obj-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.o
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@ -12,6 +12,7 @@
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# of this archive for more details.
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TARGETDIR=kbuildall.results
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BOARD=$1
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if [ ! -f util/kbuildall/kbuildall ]; then
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echo "This application must be run from the"
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@ -36,10 +37,16 @@ builddefconfig() {
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yes "" | $MAKE oldconfig
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}
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rm -rf $TARGETDIR
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mkdir -p $TARGETDIR
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ALLTARGETS=`(cd src/mainboard; ls */*/Config.lb | sed s,/Config.lb,,)`
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TARGETCOUNT=`echo $ALLTARGETS | wc -w`
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if [ -n "$BOARD" ]; then
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TARGETCOUNT=1
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ALLTARGETS=$BOARD
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else
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rm -rf $TARGETDIR
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fi
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mkdir -p $TARGETDIR
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CURRENTARGET=0
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for dir in $ALLTARGETS; do
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i=`expr $i + 1`
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