GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/intel/adlrvp_p: Enable TCSS USB ports device path 

TEST=Boot RVP, ensure Type C ports operate correctly.

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: Iadc0df2e6e29a5afbcbb7db1ae0be6546dbcdc1a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57274
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
This commit is contained in:
Meera Ravindranath 2021-08-31 10:40:29 +05:30 committed by Felix Held
parent 48e7d49020
commit 89356d142b
1 changed files with 19 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
src/mainboard/intel/adlrvp/variants/adlrvp_p_ext_ec/overridetree.cb
View File

@ -9,6 +9,25 @@ chip soc/intel/alderlake
device pnp 0c09.0 on end
end
end
device ref tcss_xhci on
chip drivers/usb/acpi
register "type" = "UPC_TYPE_HUB"
device ref tcss_root_hub on
chip drivers/usb/acpi
register "desc" = ""TypeC Port 1""
device ref tcss_usb3_port1 on end
end
chip drivers/usb/acpi
register "desc" = ""TypeC Port 2""
device ref tcss_usb3_port2 on end
end
chip drivers/usb/acpi
register "desc" = ""TypeC Port 3""
device ref tcss_usb3_port3 on end
end
end
end
end
device ref pmc hidden
# The pmc_mux chip driver is a placeholder for the
# PMC.MUX device in the ACPI hierarchy.