mb/lenovo/t400: Use acpi_s3_resume_allowed()
Apply commit12d681b2
(intel/i945 gm45: Use acpi_s3_resume_allowed()) also to the Lenovo T400. See also commit42ae0bae
with Change-Id I4e1e0ccf2abbe175c0e5ddcbb6ee7bf6afb1ae88 (mb/lenovo/x200: Use acpi_s3_resume_allowed()) Change-Id: I9d4ac711375977a979a8b3e5606e2197847e88de Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Reviewed-on: https://review.coreboot.org/29147 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
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@ -101,16 +101,16 @@ void mainboard_romstage_entry(unsigned long bist)
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/* Check for S3 resume. */
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/* Check for S3 resume. */
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const u32 pm1_cnt = inl(DEFAULT_PMBASE + 0x04);
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const u32 pm1_cnt = inl(DEFAULT_PMBASE + 0x04);
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if (((pm1_cnt >> 10) & 7) == 5) {
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if (((pm1_cnt >> 10) & 7) == 5) {
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#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
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if (acpi_s3_resume_allowed()) {
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printk(BIOS_DEBUG, "Resume from S3 detected.\n");
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printk(BIOS_DEBUG, "Resume from S3 detected.\n");
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s3resume = 1;
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s3resume = 1;
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/* Clear SLP_TYPE. This will break stage2 but
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/* Clear SLP_TYPE. This will break stage2 but
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* we care for that when we get there.
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* we care for that when we get there.
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*/
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*/
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outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + 0x04);
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outl(pm1_cnt & ~(7 << 10), DEFAULT_PMBASE + 0x04);
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#else
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} else {
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printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
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printk(BIOS_DEBUG, "Resume from S3 detected, but disabled.\n");
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#endif
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}
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}
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}
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/* RAM initialization */
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/* RAM initialization */
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