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mb/emulation/qemu-q35: Rename header 

The emulated northbridge is Q35. GM35 does not exist.

Tested, still boots.

Change-Id: Id8e114a43b54b71087d09d143176ed94329ab7af
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50023
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2021-01-28 10:57:13 +01:00
parent 7d638784a2
commit 899525d92c
3 changed files with 4 additions and 4 deletions
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2
src/mainboard/emulation/qemu-q35/bootblock.c
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@ -6,7 +6,7 @@
#include <southbridge/intel/i82801ix/i82801ix.h> #include <southbridge/intel/i82801ix/i82801ix.h>
#include <console/console.h> #include <console/console.h>
#include "gm35.h" #include "q35.h"
static void bootblock_northbridge_init(void) static void bootblock_northbridge_init(void)
{ {

4
src/mainboard/emulation/qemu-q35/gm35.h → src/mainboard/emulation/qemu-q35/q35.h
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@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#ifndef __MAINBOARD_EMU_GM35_H__ #ifndef __MAINBOARD_EMU_Q35_H__
#define __MAINBOARD_EMU_GM35_H__ #define __MAINBOARD_EMU_Q35_H__
#define D0F0_PCIEXBAR_LO 0x60 #define D0F0_PCIEXBAR_LO 0x60
#define D0F0_PCIEXBAR_HI 0x64 #define D0F0_PCIEXBAR_HI 0x64

2
src/mainboard/emulation/qemu-q35/romstage.c
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@ -6,7 +6,7 @@
#include <southbridge/intel/i82801ix/i82801ix.h> #include <southbridge/intel/i82801ix/i82801ix.h>
#include <device/pci_ops.h> #include <device/pci_ops.h>
#include "gm35.h" #include "q35.h"
static void mainboard_machine_check(void) static void mainboard_machine_check(void)
{ {