From 89a269af9dd289f1a7a2e44a3854e14483d20431 Mon Sep 17 00:00:00 2001
From: Frank Wu <frank_wu@compal.corp-partner.google.com>
Date: Mon, 16 Jan 2023 16:06:06 +0800
Subject: [PATCH] mb/google/skyrim/var/markarth: set dxio_tx_vboost_enable

Turn on the dxio_tx_vboost_enable for markarth in coreboot.

It needs to confirm the PCIe Signal Integrity after enabled.

BUG=b:263534907, b:263216451
BRANCH=none
TEST=emerge-skyrim coreboot chromeos-bootimage

Signed-off-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Change-Id: I0798c1d9788e1911c2643bf387722b072aa79045
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Reviewed-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-by: Chao Gui <chaogui@google.com>
---
 src/mainboard/google/skyrim/variants/markarth/overridetree.cb | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mainboard/google/skyrim/variants/markarth/overridetree.cb b/src/mainboard/google/skyrim/variants/markarth/overridetree.cb
index f8e5268aea..f50820bdeb 100644
--- a/src/mainboard/google/skyrim/variants/markarth/overridetree.cb
+++ b/src/mainboard/google/skyrim/variants/markarth/overridetree.cb
@@ -3,6 +3,9 @@
 chip soc/amd/mendocino
 
 	device domain 0 on
+
+		register "dxio_tx_vboost_enable" = "1"
+
 		device ref gpp_bridge_1 on
 			# Required so the NVMe gets placed into D3 when entering S0i3.
 			chip drivers/pcie/rtd3/device