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soc/braswell: Disable SD card detect simulation in FSP 

CQ-DEPEND=CL:13038

Debounce for SD card detect takes a long time and thus affects boot time.
Disabling SD card detect simulation in FSP through UPD

Original-Reviewed-on: https://chromium-review.googlesource.com/311850
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Tested-by: Hannah Williams <hannah.williams@intel.com>

Change-Id: Iab0794ec058460df94f6bbed5c9b0911e57e3a71
Signed-off-by: Divya Sasidharan <divya.s.sasidharan@intel.com>
Reviewed-on: https://review.coreboot.org/12742
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Divya Sasidharan 2015-10-28 15:02:35 -07:00 committed by Martin Roth
parent b0eb594b34
commit 89a6685ede
2 changed files with 4 additions and 0 deletions
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3
src/soc/intel/braswell/chip.c
View File

@ -152,6 +152,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->PMIC_I2CBus = config->PMIC_I2CBus;
params->ISPEnable = config->ISPEnable;
params->ISPPciDevConfig = config->ISPPciDevConfig;
params->PcdSdDetectChk = config->PcdSdDetectChk;
}
void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
@ -312,6 +313,8 @@ void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
old->ISPEnable, new->ISPEnable);
fsp_display_upd_value("ISPPciDevConfig", 1,
old->ISPPciDevConfig, new->ISPPciDevConfig);
fsp_display_upd_value("PcdSdDetectChk", 1,
old->PcdSdDetectChk, new->PcdSdDetectChk);
}
/* Called at BS_DEV_INIT_CHIPS time -- very early. Just after BS_PRE_DEVICE. */

1
src/soc/intel/braswell/chip.h
View File

@ -139,6 +139,7 @@ struct soc_intel_braswell_config {
UINT8 PMIC_I2CBus;
UINT8 ISPEnable;
UINT8 ISPPciDevConfig;
UINT8 PcdSdDetectChk; /*Enable\Disable SD Card Detect Simulation*/
};
extern struct chip_operations soc_intel_braswell_ops;