sandybridge/raminit_common.c: fix printram statement
Change-Id: Iddea8cc71dc1fb33d46b22dd19e39bf1c1257555 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/28117 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -195,7 +195,7 @@ void dram_xover(ramctr_timing * ctrl)
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static void dram_odt_stretch(ramctr_timing *ctrl, int channel)
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static void dram_odt_stretch(ramctr_timing *ctrl, int channel)
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{
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{
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struct cpuid_result cpures;
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struct cpuid_result cpures;
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u32 cpu, stretch;
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u32 addr, cpu, stretch;
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stretch = ctrl->ref_card_offset[channel];
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stretch = ctrl->ref_card_offset[channel];
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/* ODT stretch: Delay ODT signal by stretch value.
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/* ODT stretch: Delay ODT signal by stretch value.
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@ -205,14 +205,17 @@ static void dram_odt_stretch(ramctr_timing *ctrl, int channel)
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if (IS_SANDY_CPU(cpu) && IS_SANDY_CPU_C(cpu)) {
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if (IS_SANDY_CPU(cpu) && IS_SANDY_CPU_C(cpu)) {
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if (stretch == 2)
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if (stretch == 2)
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stretch = 3;
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stretch = 3;
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MCHBAR32_AND_OR(0x401c + 0x400 * channel, 0xffffc3ff,
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addr = 0x401c + 0x400 * channel;
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MCHBAR32_AND_OR(addr, 0xffffc3ff,
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(stretch << 12) | (stretch << 10));
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(stretch << 12) | (stretch << 10));
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printram("OTHP Workaround [%x] = %x\n", addr, reg);
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printk(RAM_DEBUG, "OTHP Workaround [%x] = %x\n", addr,
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MCHBAR32(addr));
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} else {
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} else {
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// OTHP
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// OTHP
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MCHBAR32_AND_OR(0x400c + 0x400 * channel, 0xfff0ffff,
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addr = 0x400c + 0x400 * channel;
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MCHBAR32_AND_OR(addr, 0xfff0ffff,
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(stretch << 16) | (stretch << 18));
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(stretch << 16) | (stretch << 18));
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printram("OTHP [%x] = %x\n", addr, reg);
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printk(RAM_DEBUG, "OTHP [%x] = %x\n", addr, MCHBAR32(addr));
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}
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}
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}
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}
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