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soc/intel/common/block/cpu/car: Fix two whitespace issues 

This patch removes 1 unnecessary whitespace and add 1 whitespace into IA
common car code block.

Change-Id: I3690b5f219f5326cfca7956f21132062aa89648e
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48381
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2020-12-06 22:54:10 +05:30
parent cdd9db340b
commit 89b296c3fe
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/common/block/cpu/Kconfig
View File

@ -64,7 +64,7 @@ config USE_CAR_NEM_ENHANCED_V2
select COS_MAPPED_TO_MSB select COS_MAPPED_TO_MSB
help help
This config supports INTEL_CAR_NEM_ENHANCED mode on This config supports INTEL_CAR_NEM_ENHANCED mode on
TGL platform. TGL platform.
config COS_MAPPED_TO_MSB config COS_MAPPED_TO_MSB
bool bool

2
src/soc/intel/common/block/cpu/car/cache_as_ram.S
View File

@ -413,7 +413,7 @@ find_llc_subleaf:
set_eviction_mask: set_eviction_mask:
mov %ebx, %ecx /* back up the number of ways */ mov %ebx, %ecx /* back up the number of ways */
mov %eax, %ebx /* back up the non-eviction mask*/ mov %eax, %ebx /* back up the non-eviction mask */
/* /*
* Set MSR 0xC91 IA32_L3_MASK_1 or MSR 0x1891 IA32_CR_SF_QOS_MASK_1 * Set MSR 0xC91 IA32_L3_MASK_1 or MSR 0x1891 IA32_CR_SF_QOS_MASK_1
* This MSR contain one bit per each way of LLC * This MSR contain one bit per each way of LLC