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soc/intel/meteorlake: transition full control over PM Timer from FSP to coreboot 

Set `EnableTcoTimer=1` in order to keep FSP from
 1) enabling ACPI Timer emulation in uCode.
 2) disabling the PM ACPI Timer.

Both actions are now done in coreboot.

`EnableTcoTimer=1` makes FSP skip these steps in any possible case
including `SkipMpInit=0`, `SkipMpInit=1`, use of the MP PPI or FSP
Multiphase Init. This way full control is left to coreboot.

Port of commit 0e905801f8 ("soc/intel: transition full control over PM
Timer from FSP to coreboot").

NOTE: This will have a huge power impact when it's enabled. If TCO timer
is disabled, uCode ACPI timer emulation must be enabled, and WDAT table
must not be exposed to the OS.

BUG=none
TEST=Boot to OS on google/rex.

Excerpt from google/rex coreboot log:
[SPEW ]   EnableTcoTimer                      = 1

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I2693f0390e6c9fa92fec366ab87589c3bcea9027
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Kapil Porwal 2022-11-15 19:06:49 +05:30 committed by Felix Held
parent 20c64a1210
commit 89ea31248e
1 changed files with 14 additions and 0 deletions
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14
src/soc/intel/meteorlake/fsp_params.c
View File

@ -349,6 +349,19 @@ static void fill_fsps_8254_params(FSP_S_CONFIG *s_cfg,
s_cfg->Enable8254ClockGatingOnS3 = !CONFIG(USE_LEGACY_8254_TIMER); s_cfg->Enable8254ClockGatingOnS3 = !CONFIG(USE_LEGACY_8254_TIMER);
} }
static void fill_fsps_pm_timer_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_meteorlake_config *config)
{
/*
* Legacy PM ACPI Timer (and TCO Timer)
* This *must* be 1 in any case to keep FSP from
* 1) enabling PM ACPI Timer emulation in uCode.
* 2) disabling the PM ACPI Timer.
* We handle both by ourself!
*/
s_cfg->EnableTcoTimer = 1;
}
static void fill_fsps_pcie_params(FSP_S_CONFIG *s_cfg, static void fill_fsps_pcie_params(FSP_S_CONFIG *s_cfg,
const struct soc_intel_meteorlake_config *config) const struct soc_intel_meteorlake_config *config)
{ {
@ -429,6 +442,7 @@ static void soc_silicon_init_params(FSP_S_CONFIG *s_cfg,
fill_fsps_vmd_params, fill_fsps_vmd_params,
fill_fsps_tbt_params, fill_fsps_tbt_params,
fill_fsps_8254_params, fill_fsps_8254_params,
fill_fsps_pm_timer_params,
fill_fsps_pcie_params, fill_fsps_pcie_params,
fill_fsps_misc_power_params, fill_fsps_misc_power_params,
fill_fsps_ufs_params, fill_fsps_ufs_params,