mb/facebook/fbg1701: correct clang issues
Corrected clang issues in fbg1701 directory. BUG=N/A TEST=build Change-Id: I968bf8418aa457a7ebd28096bd92a64211bf86dd Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35963 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Wim Vervoorn
Patrick Georgi
parent
ea98989e2c
commit
89f5967647
|
|
@ -32,16 +32,15 @@ void *load_logo(size_t *logo_size)
|
|||
return (void *)logo_data;
|
||||
}
|
||||
|
||||
logo_data_sz = cbfs_boot_load_file(filename, logo_data,
|
||||
sizeof(logo_data), CBFS_TYPE_RAW);
|
||||
logo_data_sz =
|
||||
cbfs_boot_load_file(filename, logo_data, sizeof(logo_data), CBFS_TYPE_RAW);
|
||||
if (logo_data_sz == 0)
|
||||
return NULL;
|
||||
|
||||
if (logo_size)
|
||||
*logo_size = logo_data_sz;
|
||||
|
||||
printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n",
|
||||
logo_data_sz);
|
||||
printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n", logo_data_sz);
|
||||
|
||||
return (void *)logo_data;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,10 +19,8 @@
|
|||
#define ONBOARD_H
|
||||
|
||||
/* SD CARD gpio */
|
||||
#define SDCARD_CD 81 /* Not used */
|
||||
#define SDCARD_CD 81 /* Not used */
|
||||
|
||||
#define ITE8528_CMD_PORT 0x6E
|
||||
#define ITE8528_DATA_PORT 0x6F
|
||||
|
||||
/* CPLD definitions */
|
||||
#define CPLD_PCB_VERSION_PORT 0x283
|
||||
|
|
@ -32,15 +30,17 @@
|
|||
#define CPLD_RESET_PORT 0x287
|
||||
#define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20
|
||||
#define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00
|
||||
#define ITE8528_CMD_PORT 0x6E
|
||||
#define ITE8528_DATA_PORT 0x6F
|
||||
|
||||
/* Define the items to be measured or verified */
|
||||
#define FSP (const char *)"fsp.bin"
|
||||
#define CMOS_LAYOUT (const char *)"cmos_layout.bin"
|
||||
#define RAMSTAGE (const char *)"fallback/ramstage"
|
||||
#define ROMSTAGE (const char *)"fallback/romstage"
|
||||
#define PAYLOAD (const char *)"fallback/payload"
|
||||
#define POSTCAR (const char *)"fallback/postcar"
|
||||
#define OP_ROM_VBT (const char *)"vbt.bin"
|
||||
#define MICROCODE (const char *)"cpu_microcode_blob.bin"
|
||||
#define FSP (const char *)"fsp.bin"
|
||||
#define CMOS_LAYOUT (const char *)"cmos_layout.bin"
|
||||
#define RAMSTAGE (const char *)"fallback/ramstage"
|
||||
#define ROMSTAGE (const char *)"fallback/romstage"
|
||||
#define PAYLOAD (const char *)"fallback/payload"
|
||||
#define POSTCAR (const char *)"fallback/postcar"
|
||||
#define OP_ROM_VBT (const char *)"vbt.bin"
|
||||
#define MICROCODE (const char *)"cpu_microcode_blob.bin"
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -31,295 +31,295 @@ struct edp_data {
|
|||
static const struct edp_data b101uan01_table[] = {
|
||||
/* set eDP bridge to 1200x1920 */
|
||||
/* IO */
|
||||
{ 6, 0x68, { 0x08, 0x00, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x08, 0x00, 0x01, 0x00, 0x00, 0x00} },
|
||||
/* Boot */
|
||||
{ 6, 0x68, { 0x10, 0x00, 0x78, 0x69, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x04, 0x02, 0x08, 0x02, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x08, 0x23, 0x00, 0x87, 0x02 } },
|
||||
{ 6, 0x68, { 0x10, 0x0C, 0x19, 0x04, 0x00, 0x23 } },
|
||||
{ 6, 0x68, { 0x10, 0x10, 0x06, 0x00, 0x67, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x14, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{6, 0x68, {0x10, 0x00, 0x78, 0x69, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x04, 0x02, 0x08, 0x02, 0x00} },
|
||||
{6, 0x68, {0x10, 0x08, 0x23, 0x00, 0x87, 0x02} },
|
||||
{6, 0x68, {0x10, 0x0C, 0x19, 0x04, 0x00, 0x23} },
|
||||
{6, 0x68, {0x10, 0x10, 0x06, 0x00, 0x67, 0x00} },
|
||||
{6, 0x68, {0x10, 0x14, 0x01, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* Internal */
|
||||
{ 3, 0x68, { 0xB0, 0x05, 0x0A, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x06, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x07, 0x16, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x08, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x09, 0x21, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x0A, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x14, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{3, 0x68, {0xB0, 0x05, 0x0A, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x06, 0x03, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x07, 0x16, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x08, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x09, 0x21, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x0A, 0x07, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x14, 0x03, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* eDP */
|
||||
{ 3, 0x68, { 0x80, 0x03, 0x41, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB4, 0x00, 0x0D, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0x80, 0x03, 0x41, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB4, 0x00, 0x0D, 0x00, 0x00, 0x00} },
|
||||
/* DPRX */
|
||||
{ 3, 0x68, { 0xB8, 0x8E, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8F, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x9A, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x9B, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x00, 0x0E, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x26, 0x02, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x01, 0x20, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC0, 0xF1, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC1, 0xF1, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC2, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC3, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC4, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC5, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC6, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC7, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x0B, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x33, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x5B, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x10, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x38, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x60, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x15, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x3D, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x65, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x1A, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x42, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x6A, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x1F, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x47, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x6F, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x24, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x4C, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x74, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x29, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x51, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x79, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x2E, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x56, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x7E, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x90, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x91, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x92, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x93, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x94, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x95, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x96, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x97, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x98, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x99, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x9A, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x9B, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8A, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x96, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0xD1, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0xB0, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8B, 0x04, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8C, 0x45, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8D, 0x05, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x97, 0x04, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x98, 0xE0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x99, 0x2E, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x80, 0x0E, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x14, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{3, 0x68, {0xB8, 0x8E, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8F, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x9A, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x9B, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x00, 0x0E, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x26, 0x02, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x01, 0x20, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC0, 0xF1, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC1, 0xF1, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC2, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC3, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC4, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC5, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC6, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC7, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x0B, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x33, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x5B, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x10, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x38, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x60, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x15, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x3D, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x65, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x1A, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x42, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x6A, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x1F, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x47, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x6F, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x24, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x4C, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x74, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x29, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x51, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x79, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x2E, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x56, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x7E, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x90, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x91, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x92, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x93, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x94, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x95, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x96, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x97, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x98, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x99, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x9A, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x9B, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8A, 0x03, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x96, 0x03, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0xD1, 0x07, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0xB0, 0x07, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8B, 0x04, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8C, 0x45, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8D, 0x05, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x97, 0x04, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x98, 0xE0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x99, 0x2E, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x80, 0x0E, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x14, 0x07, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* Video size */
|
||||
{ 6, 0x68, { 0x01, 0x48, 0xB0, 0x04, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x29, 0x20, 0x10, 0x0E, 0x0B, 0x3E } },
|
||||
{6, 0x68, {0x01, 0x48, 0xB0, 0x04, 0x00, 0x00} },
|
||||
{6, 0x68, {0x29, 0x20, 0x10, 0x0E, 0x0B, 0x3E} },
|
||||
/* eDP */
|
||||
{ 3, 0x68, { 0xB6, 0x31, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x80, 0x01, 0x14, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x80, 0x02, 0x02, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB6, 0x08, 0x0B, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x00, 0x1E, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x50, 0x10, 0x00, 0x00, 0x9D, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x8C, 0x40, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x80, 0x02, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0xB6, 0x31, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x80, 0x01, 0x14, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x80, 0x02, 0x02, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB6, 0x08, 0x0B, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x00, 0x1E, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x87, 0x00, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x50, 0x10, 0x00, 0x00, 0x9D, 0x00} },
|
||||
{6, 0x68, {0x00, 0x8C, 0x40, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x80, 0x02, 0x00, 0x00, 0x00} },
|
||||
/* Link Training */
|
||||
{ 3, 0x68, { 0x82, 0x02, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x82, 0x03, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x82, 0x04, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x58, 0x09, 0x00, 0x28, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x60, 0x07, 0x00, 0x0F, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x64, 0x28, 0x23, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x68, 0x0E, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0x82, 0x02, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x82, 0x03, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x82, 0x04, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x21, 0x58, 0x09, 0x00, 0x28, 0x00} },
|
||||
{6, 0x68, {0x21, 0x60, 0x07, 0x00, 0x0F, 0x00} },
|
||||
{6, 0x68, {0x21, 0x64, 0x28, 0x23, 0x00, 0x00} },
|
||||
{6, 0x68, {0x21, 0x68, 0x0E, 0x00, 0x00, 0x00} },
|
||||
/* DSI */
|
||||
{ 6, 0x68, { 0x20, 0x7C, 0x81, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x20, 0x50, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x20, 0x1C, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x20, 0x60, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{6, 0x68, {0x20, 0x7C, 0x81, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x20, 0x50, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x20, 0x1C, 0x01, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x20, 0x60, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* GPIO */
|
||||
{ 6, 0x68, { 0x08, 0x04, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x80, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x84, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x84, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x84, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x08, 0x04, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x80, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x84, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x84, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x84, 0x0F, 0x00, 0x00, 0x00} },
|
||||
/* DSI clock */
|
||||
{ 6, 0x68, { 0x20, 0x50, 0x20, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x20, 0x50, 0x20, 0x00, 0x00, 0x00} },
|
||||
/* LCD init */
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x01, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x8C, 0x80, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0xC7, 0x50, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0xC5, 0x50, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x85, 0x04, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x86, 0x08, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x83, 0xAA, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x84, 0x11, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x9C, 0x10, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0xA9, 0x4B, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x05, 0x11, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x05, 0x29, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x2A, 0x10, 0x10, 0x00, 0x04, 0x80 } },
|
||||
{ 6, 0x68, { 0x2A, 0x04, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x01, 0x00, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x8C, 0x80, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0xC7, 0x50, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0xC5, 0x50, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x85, 0x04, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x86, 0x08, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x83, 0xAA, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x84, 0x11, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x9C, 0x10, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0xA9, 0x4B, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x05, 0x11, 0x00, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x05, 0x29, 0x00, 0x81} },
|
||||
{6, 0x68, {0x2A, 0x10, 0x10, 0x00, 0x04, 0x80} },
|
||||
{6, 0x68, {0x2A, 0x04, 0x01, 0x00, 0x00, 0x00} },
|
||||
/* Check Video */
|
||||
{ 6, 0x68, { 0x01, 0x54, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x01, 0x54, 0x01, 0x00, 0x00, 0x00} },
|
||||
/* End of table */
|
||||
{ 0, 0x00, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{0, 0x00, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00} },
|
||||
};
|
||||
|
||||
static const struct edp_data b101uan08_table[] = {
|
||||
/* set eDP bridge to 1200x1920 */
|
||||
/* IO Voltage Setting */
|
||||
{ 6, 0x68, { 0x08, 0x00, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x08, 0x00, 0x01, 0x00, 0x00, 0x00} },
|
||||
/* Boot Settings */
|
||||
{ 6, 0x68, { 0x10, 0x00, 0x78, 0x69, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x04, 0x02, 0x08, 0x02, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x08, 0x22, 0x00, 0xA0, 0x02 } },
|
||||
{ 6, 0x68, { 0x10, 0x0C, 0x50, 0x04, 0x00, 0x03 } },
|
||||
{ 6, 0x68, { 0x10, 0x10, 0x10, 0x0D, 0x06, 0x01 } },
|
||||
{ 6, 0x68, { 0x10, 0x14, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{6, 0x68, {0x10, 0x00, 0x78, 0x69, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x04, 0x02, 0x08, 0x02, 0x00} },
|
||||
{6, 0x68, {0x10, 0x08, 0x22, 0x00, 0xA0, 0x02} },
|
||||
{6, 0x68, {0x10, 0x0C, 0x50, 0x04, 0x00, 0x03} },
|
||||
{6, 0x68, {0x10, 0x10, 0x10, 0x0D, 0x06, 0x01} },
|
||||
{6, 0x68, {0x10, 0x14, 0x01, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* Internal PCLK settings for Non Present or REFCLK=26MHz */
|
||||
{ 3, 0x68, { 0xB0, 0x05, 0x0A, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x06, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x07, 0x16, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x08, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x09, 0x21, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB0, 0x0A, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0xB0, 0x05, 0x0A, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x06, 0x03, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x07, 0x16, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x08, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x09, 0x21, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB0, 0x0A, 0x07, 0x00, 0x00, 0x00} },
|
||||
/* DSI Clock setting for Non Preset or REFCLK=26MHz */
|
||||
{ 6, 0x68, { 0x41, 0xB0, 0xC1, 0x22, 0x04, 0x00 } },
|
||||
{ 6, 0x68, { 0x41, 0xBC, 0x01, 0x0E, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x41, 0xC0, 0x30, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x14, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{6, 0x68, {0x41, 0xB0, 0xC1, 0x22, 0x04, 0x00} },
|
||||
{6, 0x68, {0x41, 0xBC, 0x01, 0x0E, 0x00, 0x00} },
|
||||
{6, 0x68, {0x41, 0xC0, 0x30, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x14, 0x03, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* Additional Settng for eDP */
|
||||
{ 3, 0x68, { 0x80, 0x03, 0x41, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB4, 0x00, 0x0D, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0x80, 0x03, 0x41, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB4, 0x00, 0x0D, 0x00, 0x00, 0x00} },
|
||||
/* DPRX CAD Register Setting */
|
||||
{ 3, 0x68, { 0xB8, 0x8E, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8F, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x9A, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x9B, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x00, 0x0E, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x26, 0x02, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x01, 0x20, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC0, 0xF1, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC1, 0xF1, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC2, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC3, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC4, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC5, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC6, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0xC7, 0xF0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x0B, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x33, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x5B, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x10, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x38, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x60, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x15, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x3D, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x65, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x1A, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x42, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x6A, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x1F, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x47, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x6F, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x24, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x4C, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x74, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x29, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x51, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x79, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x2E, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x56, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x7E, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x90, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x91, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x92, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x93, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x94, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x95, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x96, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x97, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x98, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x99, 0x10, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x9A, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0x9B, 0xF6, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8A, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x96, 0x03, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0xD1, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xBB, 0xB0, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8B, 0x04, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8C, 0x45, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x8D, 0x05, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x97, 0x04, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x98, 0xE0, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x99, 0x2E, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x80, 0x0E, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x14, 0x07, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{3, 0x68, {0xB8, 0x8E, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8F, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x9A, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x9B, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x00, 0x0E, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x26, 0x02, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x01, 0x20, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC0, 0xF1, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC1, 0xF1, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC2, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC3, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC4, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC5, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC6, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0xC7, 0xF0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x0B, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x33, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x5B, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x10, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x38, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x60, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x15, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x3D, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x65, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x1A, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x42, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x6A, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x1F, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x47, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x6F, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x24, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x4C, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x74, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x29, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x51, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x79, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x2E, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x56, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x7E, 0x00, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x90, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x91, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x92, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x93, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x94, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x95, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x96, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x97, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x98, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x99, 0x10, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x9A, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0x9B, 0xF6, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8A, 0x03, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x96, 0x03, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0xD1, 0x07, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xBB, 0xB0, 0x07, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8B, 0x04, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8C, 0x45, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x8D, 0x05, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x97, 0x04, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x98, 0xE0, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x99, 0x2E, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x80, 0x0E, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x14, 0x07, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x10, 0x18, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* Video size Related Settings for Non Present */
|
||||
{ 6, 0x68, { 0x01, 0x48, 0xB0, 0x04, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x29, 0x20, 0x10, 0x0E, 0x0B, 0x3E } },
|
||||
{6, 0x68, {0x01, 0x48, 0xB0, 0x04, 0x00, 0x00} },
|
||||
{6, 0x68, {0x29, 0x20, 0x10, 0x0E, 0x0B, 0x3E} },
|
||||
/* eDP Settings for Link Training*/
|
||||
{ 3, 0x68, { 0xB6, 0x31, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x80, 0x01, 0x14, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x80, 0x02, 0x02, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB6, 0x08, 0x0B, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0xB8, 0x00, 0x1E, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x50, 0x10, 0x00, 0x00, 0x9D, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x8C, 0x40, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x80, 0x02, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0xB6, 0x31, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x80, 0x01, 0x14, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x80, 0x02, 0x02, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB6, 0x08, 0x0B, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0xB8, 0x00, 0x1E, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x87, 0x00, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x50, 0x10, 0x00, 0x00, 0x9D, 0x00} },
|
||||
{6, 0x68, {0x00, 0x8C, 0x40, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x80, 0x02, 0x00, 0x00, 0x00} },
|
||||
/* Link Training */
|
||||
{ 3, 0x68, { 0x82, 0x02, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x82, 0x03, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{ 3, 0x68, { 0x82, 0x04, 0xFF, 0x00, 0x00, 0x00 } },
|
||||
{3, 0x68, {0x82, 0x02, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x82, 0x03, 0xFF, 0x00, 0x00, 0x00} },
|
||||
{3, 0x68, {0x82, 0x04, 0xFF, 0x00, 0x00, 0x00} },
|
||||
/* DSI Transition Time Setting for Non Preset */
|
||||
{ 6, 0x68, { 0x21, 0x54, 0x0D, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x58, 0x06, 0x00, 0x2A, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x5C, 0x07, 0x00, 0x0E, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x60, 0x07, 0x00, 0x10, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x64, 0x10, 0x27, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x68, 0x0E, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x6C, 0x0A, 0x00, 0x0E, 0x00 } },
|
||||
{ 6, 0x68, { 0x21, 0x78, 0x0E, 0x00, 0x0D, 0x00 } },
|
||||
{6, 0x68, {0x21, 0x54, 0x0D, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x21, 0x58, 0x06, 0x00, 0x2A, 0x00} },
|
||||
{6, 0x68, {0x21, 0x5C, 0x07, 0x00, 0x0E, 0x00} },
|
||||
{6, 0x68, {0x21, 0x60, 0x07, 0x00, 0x10, 0x00} },
|
||||
{6, 0x68, {0x21, 0x64, 0x10, 0x27, 0x00, 0x00} },
|
||||
{6, 0x68, {0x21, 0x68, 0x0E, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x21, 0x6C, 0x0A, 0x00, 0x0E, 0x00} },
|
||||
{6, 0x68, {0x21, 0x78, 0x0E, 0x00, 0x0D, 0x00} },
|
||||
/* DSI Start */
|
||||
{ 6, 0x68, { 0x20, 0x7C, 0x81, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x20, 0x50, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x20, 0x1C, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x20, 0x60, 0xFF, 0xFF, 0xFF, 0xFF } },
|
||||
{6, 0x68, {0x20, 0x7C, 0x81, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x20, 0x50, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x20, 0x1C, 0x01, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x20, 0x60, 0xFF, 0xFF, 0xFF, 0xFF} },
|
||||
/* GPIO for LCD control*/
|
||||
{ 6, 0x68, { 0x08, 0x04, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x80, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x84, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x84, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{ 6, 0x68, { 0x00, 0x84, 0x0F, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x08, 0x04, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x80, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x84, 0x0F, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x84, 0x00, 0x00, 0x00, 0x00} },
|
||||
{6, 0x68, {0x00, 0x84, 0x0F, 0x00, 0x00, 0x00} },
|
||||
/* DSI Hs Clock Mode */
|
||||
{ 6, 0x68, { 0x20, 0x50, 0x20, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x20, 0x50, 0x20, 0x00, 0x00, 0x00} },
|
||||
/* LCD Initialization */
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0xBF, 0xA5, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x01, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x8F, 0xA5, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x83, 0xAA, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x84, 0x11, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0xA9, 0x48, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x83, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x84, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x22, 0xFC, 0x15, 0x8F, 0x00, 0x81 } },
|
||||
{ 6, 0x68, { 0x2A, 0x10, 0x10, 0x00, 0x04, 0x80 } },
|
||||
{ 6, 0x68, { 0x2A, 0x04, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0xBF, 0xA5, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x01, 0x00, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x8F, 0xA5, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x83, 0xAA, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x84, 0x11, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0xA9, 0x48, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x83, 0x00, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x84, 0x00, 0x81} },
|
||||
{6, 0x68, {0x22, 0xFC, 0x15, 0x8F, 0x00, 0x81} },
|
||||
{6, 0x68, {0x2A, 0x10, 0x10, 0x00, 0x04, 0x80} },
|
||||
{6, 0x68, {0x2A, 0x04, 0x01, 0x00, 0x00, 0x00} },
|
||||
/* Check if eDP video is coming */
|
||||
{ 6, 0x68, { 0x01, 0x54, 0x01, 0x00, 0x00, 0x00 } },
|
||||
{6, 0x68, {0x01, 0x54, 0x01, 0x00, 0x00, 0x00} },
|
||||
/* End of table */
|
||||
{ 0, 0x00, { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } },
|
||||
{0, 0x00, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00} },
|
||||
};
|
||||
|
||||
static void mainboard_configure_edp_bridge(void)
|
||||
|
|
@ -341,8 +341,8 @@ static void mainboard_configure_edp_bridge(void)
|
|||
loops = 5;
|
||||
do {
|
||||
status = smbus_i2c_block_write(edptable->address,
|
||||
edptable->payload_length,
|
||||
(u8 *)&edptable->data[0]);
|
||||
edptable->payload_length,
|
||||
(u8 *)&edptable->data[0]);
|
||||
} while (--loops && (status < 0));
|
||||
|
||||
if (loops == 0) {
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@
|
|||
#include <stdint.h>
|
||||
|
||||
void mainboard_memory_init_params(struct romstage_params *params,
|
||||
MEMORY_INIT_UPD *memory_params)
|
||||
MEMORY_INIT_UPD *memory_params)
|
||||
{
|
||||
struct region_device spd_rdev;
|
||||
u8 spd_index = 0;
|
||||
|
|
@ -68,8 +68,8 @@ void mainboard_after_memory_init(void)
|
|||
*/
|
||||
|
||||
static const uint8_t crtm_version[] =
|
||||
CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING
|
||||
COREBOOT_VERSION COREBOOT_EXTRA_VERSION " " COREBOOT_BUILD;
|
||||
CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING COREBOOT_VERSION COREBOOT_EXTRA_VERSION
|
||||
" " COREBOOT_BUILD;
|
||||
|
||||
int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
|
||||
{
|
||||
|
|
@ -79,18 +79,16 @@ int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
|
|||
/* Use FirmwareVersion string to represent CRTM version. */
|
||||
printk(BIOS_DEBUG, "%s: Measure CRTM Version\n", __func__);
|
||||
memset(&tcgEventHdr, 0, sizeof(tcgEventHdr));
|
||||
tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0;
|
||||
tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0;
|
||||
tcgEventHdr.eventType = EV_S_CRTM_VERSION;
|
||||
tcgEventHdr.eventSize = sizeof(crtm_version);
|
||||
printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__,
|
||||
tcgEventHdr.eventSize);
|
||||
printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__, tcgEventHdr.eventSize);
|
||||
|
||||
status = mboot_hash_extend_log(activePcr, 0, (uint8_t *)crtm_version,
|
||||
tcgEventHdr.eventSize, &tcgEventHdr,
|
||||
(uint8_t *)crtm_version, 0);
|
||||
if (status) {
|
||||
printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n",
|
||||
status);
|
||||
printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", status);
|
||||
}
|
||||
|
||||
return status;
|
||||
|
|
|
|||
Loading…
Reference in New Issue