mb/facebook/fbg1701: correct clang issues
Corrected clang issues in fbg1701 directory. BUG=N/A TEST=build Change-Id: I968bf8418aa457a7ebd28096bd92a64211bf86dd Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35963 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
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@ -32,16 +32,15 @@ void *load_logo(size_t *logo_size)
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return (void *)logo_data;
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return (void *)logo_data;
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}
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}
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logo_data_sz = cbfs_boot_load_file(filename, logo_data,
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logo_data_sz =
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sizeof(logo_data), CBFS_TYPE_RAW);
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cbfs_boot_load_file(filename, logo_data, sizeof(logo_data), CBFS_TYPE_RAW);
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if (logo_data_sz == 0)
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if (logo_data_sz == 0)
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return NULL;
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return NULL;
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if (logo_size)
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if (logo_size)
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*logo_size = logo_data_sz;
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*logo_size = logo_data_sz;
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printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n",
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printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n", logo_data_sz);
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logo_data_sz);
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return (void *)logo_data;
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return (void *)logo_data;
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}
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}
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@ -21,8 +21,6 @@
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/* SD CARD gpio */
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/* SD CARD gpio */
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#define SDCARD_CD 81 /* Not used */
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#define SDCARD_CD 81 /* Not used */
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#define ITE8528_CMD_PORT 0x6E
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#define ITE8528_DATA_PORT 0x6F
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/* CPLD definitions */
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/* CPLD definitions */
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#define CPLD_PCB_VERSION_PORT 0x283
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#define CPLD_PCB_VERSION_PORT 0x283
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@ -32,6 +30,8 @@
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#define CPLD_RESET_PORT 0x287
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#define CPLD_RESET_PORT 0x287
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#define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20
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#define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20
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#define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00
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#define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00
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#define ITE8528_CMD_PORT 0x6E
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#define ITE8528_DATA_PORT 0x6F
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/* Define the items to be measured or verified */
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/* Define the items to be measured or verified */
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#define FSP (const char *)"fsp.bin"
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#define FSP (const char *)"fsp.bin"
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@ -68,8 +68,8 @@ void mainboard_after_memory_init(void)
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*/
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*/
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static const uint8_t crtm_version[] =
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static const uint8_t crtm_version[] =
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CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING
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CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING COREBOOT_VERSION COREBOOT_EXTRA_VERSION
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COREBOOT_VERSION COREBOOT_EXTRA_VERSION " " COREBOOT_BUILD;
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" " COREBOOT_BUILD;
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int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
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int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
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{
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{
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@ -82,15 +82,13 @@ int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
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tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0;
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tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0;
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tcgEventHdr.eventType = EV_S_CRTM_VERSION;
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tcgEventHdr.eventType = EV_S_CRTM_VERSION;
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tcgEventHdr.eventSize = sizeof(crtm_version);
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tcgEventHdr.eventSize = sizeof(crtm_version);
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printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__,
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printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__, tcgEventHdr.eventSize);
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tcgEventHdr.eventSize);
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status = mboot_hash_extend_log(activePcr, 0, (uint8_t *)crtm_version,
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status = mboot_hash_extend_log(activePcr, 0, (uint8_t *)crtm_version,
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tcgEventHdr.eventSize, &tcgEventHdr,
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tcgEventHdr.eventSize, &tcgEventHdr,
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(uint8_t *)crtm_version, 0);
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(uint8_t *)crtm_version, 0);
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if (status) {
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if (status) {
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printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n",
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printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", status);
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status);
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}
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}
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return status;
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return status;
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