mb/facebook/fbg1701: correct clang issues

Corrected clang issues in fbg1701 directory.

BUG=N/A
TEST=build

Change-Id: I968bf8418aa457a7ebd28096bd92a64211bf86dd
Signed-off-by: Wim Vervoorn <wvervoorn@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35963
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Wim Vervoorn 2019-10-11 13:52:42 +02:00 committed by Patrick Georgi
parent ea98989e2c
commit 89f5967647
4 changed files with 278 additions and 281 deletions

View File

@ -32,16 +32,15 @@ void *load_logo(size_t *logo_size)
return (void *)logo_data; return (void *)logo_data;
} }
logo_data_sz = cbfs_boot_load_file(filename, logo_data, logo_data_sz =
sizeof(logo_data), CBFS_TYPE_RAW); cbfs_boot_load_file(filename, logo_data, sizeof(logo_data), CBFS_TYPE_RAW);
if (logo_data_sz == 0) if (logo_data_sz == 0)
return NULL; return NULL;
if (logo_size) if (logo_size)
*logo_size = logo_data_sz; *logo_size = logo_data_sz;
printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n", printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n", logo_data_sz);
logo_data_sz);
return (void *)logo_data; return (void *)logo_data;
} }

View File

@ -21,8 +21,6 @@
/* SD CARD gpio */ /* SD CARD gpio */
#define SDCARD_CD 81 /* Not used */ #define SDCARD_CD 81 /* Not used */
#define ITE8528_CMD_PORT 0x6E
#define ITE8528_DATA_PORT 0x6F
/* CPLD definitions */ /* CPLD definitions */
#define CPLD_PCB_VERSION_PORT 0x283 #define CPLD_PCB_VERSION_PORT 0x283
@ -32,6 +30,8 @@
#define CPLD_RESET_PORT 0x287 #define CPLD_RESET_PORT 0x287
#define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20 #define CPLD_CMD_RESET_DSI_BRIDGE_ACTIVE 0x20
#define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00 #define CPLD_CMD_RESET_DSI_BRIDGE_INACTIVE 0x00
#define ITE8528_CMD_PORT 0x6E
#define ITE8528_DATA_PORT 0x6F
/* Define the items to be measured or verified */ /* Define the items to be measured or verified */
#define FSP (const char *)"fsp.bin" #define FSP (const char *)"fsp.bin"

View File

@ -68,8 +68,8 @@ void mainboard_after_memory_init(void)
*/ */
static const uint8_t crtm_version[] = static const uint8_t crtm_version[] =
CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING CONFIG_VENDORCODE_ELTAN_CRTM_VERSION_STRING COREBOOT_VERSION COREBOOT_EXTRA_VERSION
COREBOOT_VERSION COREBOOT_EXTRA_VERSION " " COREBOOT_BUILD; " " COREBOOT_BUILD;
int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr) int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
{ {
@ -82,15 +82,13 @@ int mb_crtm(EFI_TCG2_EVENT_ALGORITHM_BITMAP activePcr)
tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0; tcgEventHdr.pcrIndex = MBOOT_PCR_INDEX_0;
tcgEventHdr.eventType = EV_S_CRTM_VERSION; tcgEventHdr.eventType = EV_S_CRTM_VERSION;
tcgEventHdr.eventSize = sizeof(crtm_version); tcgEventHdr.eventSize = sizeof(crtm_version);
printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__, printk(BIOS_DEBUG, "%s: EventSize - %u\n", __func__, tcgEventHdr.eventSize);
tcgEventHdr.eventSize);
status = mboot_hash_extend_log(activePcr, 0, (uint8_t *)crtm_version, status = mboot_hash_extend_log(activePcr, 0, (uint8_t *)crtm_version,
tcgEventHdr.eventSize, &tcgEventHdr, tcgEventHdr.eventSize, &tcgEventHdr,
(uint8_t *)crtm_version, 0); (uint8_t *)crtm_version, 0);
if (status) { if (status) {
printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", printk(BIOS_DEBUG, "Measure CRTM Version returned 0x%x\n", status);
status);
} }
return status; return status;