soc/intel/apollolake: Fix indentation for the PMC (pm.h) macros
This patch fixes the alignment of the PMC macros defined in the pm.h file. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ia8d35a5d104658b7900fde7f7b8c6f88530a614e Reviewed-on: https://review.coreboot.org/c/coreboot/+/72129 Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -165,21 +165,21 @@
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WARM_RESET_STS | GLOBAL_RESET_STS | \
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WARM_RESET_STS | GLOBAL_RESET_STS | \
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SRS | MS4V)
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SRS | MS4V)
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#define GEN_PMCON2 0x1024
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#define GEN_PMCON2 0x1024
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# define LPC_LPB_CLK_CTRL ((1 << 11) | (1 << 12) | (1 << 13))
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#define LPC_LPB_CLK_CTRL ((1 << 11) | (1 << 12) | (1 << 13))
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# define BIOS_PCI_EXP_EN (1 << 10)
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#define BIOS_PCI_EXP_EN (1 << 10)
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# define PWRBTN_LVL (1 << 9)
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#define PWRBTN_LVL (1 << 9)
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# define SMI_LOCK (1 << 4)
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#define SMI_LOCK (1 << 4)
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# define PER_SMI_SEL (1 << 0)
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#define PER_SMI_SEL (1 << 0)
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#define GEN_PMCON3 0x1028
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#define GEN_PMCON3 0x1028
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# define SLP_S3_ASSERT_WIDTH_SHIFT 10
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#define SLP_S3_ASSERT_WIDTH_SHIFT 10
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# define SLP_S3_ASSERT_MASK (0x3 << SLP_S3_ASSERT_WIDTH_SHIFT)
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#define SLP_S3_ASSERT_MASK (0x3 << SLP_S3_ASSERT_WIDTH_SHIFT)
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# define SLP_S3_ASSERT_60_USEC 0x0
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#define SLP_S3_ASSERT_60_USEC 0x0
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# define SLP_S3_ASSERT_1_MSEC 0x1
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#define SLP_S3_ASSERT_1_MSEC 0x1
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# define SLP_S3_ASSERT_50_MSEC 0x2
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#define SLP_S3_ASSERT_50_MSEC 0x2
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# define SLP_S3_ASSERT_2_SEC 0x3
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#define SLP_S3_ASSERT_2_SEC 0x3
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#define ETR 0x1048
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#define ETR 0x1048
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# define CF9_LOCK (1 << 31)
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#define CF9_LOCK (1 << 31)
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# define CF9_GLB_RST (1 << 20)
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#define CF9_GLB_RST (1 << 20)
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#define GPIO_GPE_CFG 0x1050
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#define GPIO_GPE_CFG 0x1050
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#define GPE0_DWX_MASK 0xf
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#define GPE0_DWX_MASK 0xf
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#define GPE0_DW_SHIFT(x) (4 + 4*(x))
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#define GPE0_DW_SHIFT(x) (4 + 4*(x))
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