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x86 chipsets: Link non-code flow CHIPSET_BOOTBLOCK_INCLUDE files 

Non-code flow assembly stubs do not have to be included in
bootblock.S, now that we have more freedom in bootblock linking.
Rather than bringing these stubs to the config system, just link them
in the bootblock.

Note that we cannot fully remove CHIPSET_BOOTBLOCK_INCLUDE at this
point, as some intel SOCs use this stub for code flow.

objdump -h build/cbfs/fallback/bootblock.debug on a few random boards
confirms that the appropriate sections are still included in the
final binary.

Change-Id: Id3f9ece14e399c1cc83090f407780c4a05a076f0
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-on: https://review.coreboot.org/11856
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Alexandru Gagniuc 2015-10-05 08:00:51 -07:00 committed by Martin Roth
parent acc94a73ba
commit 8a13743569
23 changed files with 8 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/cpu/dmp/vortex86ex/Kconfig
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@ -73,8 +73,4 @@ config PLL_500_375_33
endchoice endchoice
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "cpu/dmp/vortex86ex/chipset_bootblock.inc"
endif endif

2
src/cpu/dmp/vortex86ex/Makefile.inc
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@ -21,5 +21,7 @@ subdirs-y += ../../x86/smm
bootblock-y += biosdata.ld bootblock-y += biosdata.ld
bootblock-y += biosdata_ex.ld bootblock-y += biosdata_ex.ld
bootblock-y += biosdata.S
bootblock-y += biosdata_ex.S
ROMCCFLAGS := -mcpu=i386 -O2 ROMCCFLAGS := -mcpu=i386 -O2

0
src/cpu/dmp/vortex86ex/biosdata.inc → src/cpu/dmp/vortex86ex/biosdata.S
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0
src/cpu/dmp/vortex86ex/biosdata_ex.inc → src/cpu/dmp/vortex86ex/biosdata_ex.S
View File

2
src/cpu/dmp/vortex86ex/chipset_bootblock.inc
View File

@ -1,2 +0,0 @@
#include "biosdata.inc"
#include "biosdata_ex.inc"

8
src/northbridge/via/vx800/Kconfig
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@ -3,11 +3,3 @@ config NORTHBRIDGE_VIA_VX800
select HAVE_DEBUG_RAM_SETUP select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS select HAVE_DEBUG_SMBUS
select LATE_CBMEM_INIT select LATE_CBMEM_INIT
if NORTHBRIDGE_VIA_VX800
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "northbridge/via/vx800/romstrap.inc"
endif

1
src/northbridge/via/vx800/Makefile.inc
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@ -22,5 +22,6 @@ ramstage-y += lpc.c
ramstage-y += ide.c ramstage-y += ide.c
bootblock-y += romstrap.ld bootblock-y += romstrap.ld
bootblock-y += romstrap.S
endif endif

0
src/northbridge/via/vx800/romstrap.inc → src/northbridge/via/vx800/romstrap.S
View File

4
src/northbridge/via/vx900/Kconfig
View File

@ -39,8 +39,4 @@ config VGA_BIOS_ID
string string
default "1106,7122" default "1106,7122"
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "northbridge/via/vx900/romstrap.inc"
endif endif

1
src/northbridge/via/vx900/Makefile.inc
View File

@ -44,5 +44,6 @@ ramstage-y += ./../../../drivers/pc80/vga/vga_io.c
bootblock-y += romstrap.ld bootblock-y += romstrap.ld
bootblock-y += romstrap.S
endif endif

0
src/northbridge/via/vx900/romstrap.inc → src/northbridge/via/vx900/romstrap.S
View File

4
src/southbridge/nvidia/ck804/Kconfig
View File

@ -42,8 +42,4 @@ config HPET_MIN_TICKS
hex hex
default 0xfa default 0xfa
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "southbridge/nvidia/ck804/romstrap.inc"
endif endif

1
src/southbridge/nvidia/ck804/Makefile.inc
View File

@ -22,5 +22,6 @@ ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
romstage-y += early_smbus.c romstage-y += early_smbus.c
bootblock-y += romstrap.ld bootblock-y += romstrap.ld
bootblock-y += romstrap.S
endif endif

0
src/southbridge/nvidia/ck804/romstrap.inc → src/southbridge/nvidia/ck804/romstrap.S
View File

4
src/southbridge/nvidia/mcp55/Kconfig
View File

@ -42,8 +42,4 @@ config MCP55_PCI_E_X_3
int int
default 4 default 4
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "southbridge/nvidia/mcp55/romstrap.inc"
endif endif

1
src/southbridge/nvidia/mcp55/Makefile.inc
View File

@ -25,5 +25,6 @@ ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c
endif endif
bootblock-y += romstrap.ld bootblock-y += romstrap.ld
bootblock-y += romstrap.S
endif endif

0
src/southbridge/nvidia/mcp55/romstrap.inc → src/southbridge/nvidia/mcp55/romstrap.S
View File

4
src/southbridge/sis/sis966/Kconfig
View File

@ -14,8 +14,4 @@ config EHCI_BAR
hex hex
default 0xfef00000 default 0xfef00000
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "southbridge/sis/sis966/romstrap.inc"
endif endif

1
src/southbridge/sis/sis966/Makefile.inc
View File

@ -16,5 +16,6 @@ romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c
ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c
bootblock-y += romstrap.ld bootblock-y += romstrap.ld
bootblock-y += romstrap.S
endif endif

0
src/southbridge/sis/sis966/romstrap.inc → src/southbridge/sis/sis966/romstrap.S
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4
src/southbridge/via/k8t890/Kconfig
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@ -51,8 +51,4 @@ config VIDEO_MB
default -1 if K8M890_VIDEO_MB_CMOS default -1 if K8M890_VIDEO_MB_CMOS
depends on SOUTHBRIDGE_VIA_K8M890_VGA_EN depends on SOUTHBRIDGE_VIA_K8M890_VGA_EN
config CHIPSET_BOOTBLOCK_INCLUDE
string
default "southbridge/via/k8t890/romstrap.inc"
endif # SOUTHBRIDGE_K8T890 endif # SOUTHBRIDGE_K8T890

1
src/southbridge/via/k8t890/Makefile.inc
View File

@ -11,5 +11,6 @@ ramstage-y += error.c
ramstage-y += chrome.c ramstage-y += chrome.c
bootblock-y += romstrap.ld bootblock-y += romstrap.ld
bootblock-y += romstrap.S
endif endif

0
src/southbridge/via/k8t890/romstrap.inc → src/southbridge/via/k8t890/romstrap.S
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