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adapt irq values to pirq table 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2004-01-21 16:40:41 +00:00
parent a65b14ab50
commit 8a1678fb90
1 changed files with 12 additions and 12 deletions
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24
src/mainboard/amd/solo/mptable.c
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@ -125,13 +125,13 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
/* PCI Slot 1 */ /* PCI Slot 1 */
#warning "FIXME get the irqs right, it's just hacked to work for now" #warning "FIXME get the irqs right, it's just hacked to work for now"
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|0, 0x02, 0x11); bus_8111_1, (4<<2)|0, 0x02, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|1, 0x02, 0x12); bus_8111_1, (4<<2)|1, 0x02, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|2, 0x02, 0x13); bus_8111_1, (4<<2)|2, 0x02, 0x12);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (4<<2)|3, 0x02, 0x10); bus_8111_1, (4<<2)|3, 0x02, 0x13);
/* PCI Slot 2 */ /* PCI Slot 2 */
@ -149,24 +149,24 @@ void *smp_write_config_table(void *v, unsigned long * processor_map)
/* PCI Slot 3 */ /* PCI Slot 3 */
#warning "FIXME get the irqs right, it's just hacked to work for now" #warning "FIXME get the irqs right, it's just hacked to work for now"
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (6<<2)|0, 0x02, 0x11); bus_8111_1, (6<<2)|0, 0x02, 0x12);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (6<<2)|1, 0x02, 0x12); bus_8111_1, (6<<2)|1, 0x02, 0x13);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (6<<2)|2, 0x02, 0x13); bus_8111_1, (6<<2)|2, 0x02, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (6<<2)|3, 0x02, 0x10); bus_8111_1, (6<<2)|3, 0x02, 0x11);
/* PCI Slot 4 */ /* PCI Slot 4 */
#warning "FIXME get the irqs right, it's just hacked to work for now" #warning "FIXME get the irqs right, it's just hacked to work for now"
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (7<<2)|0, 0x02, 0x10); bus_8111_1, (7<<2)|0, 0x02, 0x13);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (7<<2)|1, 0x02, 0x11); bus_8111_1, (7<<2)|1, 0x02, 0x10);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (7<<2)|2, 0x02, 0x12); bus_8111_1, (7<<2)|2, 0x02, 0x11);
smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT,
bus_8111_1, (7<<2)|3, 0x02, 0x13); bus_8111_1, (7<<2)|3, 0x02, 0x12);
/* Local devices */ /* Local devices */