diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 71e3ba00ae..4b4a178110 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -205,10 +205,6 @@ static __always_inline void write64(volatile void *addr, #ifdef __SIMPLE_DEVICE__ -#define PCI_ID(VENDOR_ID, DEVICE_ID) \ - ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) - - #define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC)) #include @@ -268,47 +264,6 @@ void pci_write_config32(pci_devfn_t dev, unsigned int where, uint32_t value) pci_io_write_config32(dev, where, value); } -static inline pci_devfn_t pci_io_locate_device(unsigned int pci_id, - pci_devfn_t dev) -{ - for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { - unsigned int id; - id = pci_io_read_config32(dev, 0); - if (id == pci_id) - return dev; - } - return PCI_DEV_INVALID; -} - -static inline pci_devfn_t pci_locate_device(unsigned int pci_id, - pci_devfn_t dev) -{ - for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { - unsigned int id; - id = pci_read_config32(dev, 0); - if (id == pci_id) - return dev; - } - return PCI_DEV_INVALID; -} - -static inline pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id, - unsigned int bus) -{ - pci_devfn_t dev, last; - - dev = PCI_DEV(bus, 0, 0); - last = PCI_DEV(bus, 31, 7); - - for (; dev <= last; dev += PCI_DEV(0, 0, 1)) { - unsigned int id; - id = pci_read_config32(dev, 0); - if (id == pci_id) - return dev; - } - return PCI_DEV_INVALID; -} - /* Generic functions for pnp devices */ static __always_inline void pnp_write_config( pnp_devfn_t dev, uint8_t reg, uint8_t value) diff --git a/src/device/pci_early.c b/src/device/pci_early.c index 9086e64b85..ea2ebd5033 100644 --- a/src/device/pci_early.c +++ b/src/device/pci_early.c @@ -165,3 +165,34 @@ void pci_early_bridge_init(void) pci_early_mmio_window(p2p_bridge, CONFIG_EARLY_PCI_MMIO_BASE, 0x4000); } + +/* FIXME: A lot of issues using the following, please avoid. + * Assumes 256 PCI busses, scans them all even when PCI bridges are still + * disabled. Probes all functions even if 0 is not present. + */ +pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev) +{ + for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { + unsigned int id; + id = pci_read_config32(dev, 0); + if (id == pci_id) + return dev; + } + return PCI_DEV_INVALID; +} + +pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id, unsigned int bus) +{ + pci_devfn_t dev, last; + + dev = PCI_DEV(bus, 0, 0); + last = PCI_DEV(bus, 31, 7); + + for (; dev <= last; dev += PCI_DEV(0, 0, 1)) { + unsigned int id; + id = pci_read_config32(dev, 0); + if (id == pci_id) + return dev; + } + return PCI_DEV_INVALID; +} diff --git a/src/include/device/pci.h b/src/include/device/pci.h index f0724e0f99..71d6b2025a 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -133,6 +133,12 @@ static inline const struct pci_operations *ops_pci(struct device *dev) return pops; } +#define PCI_ID(VENDOR_ID, DEVICE_ID) \ + ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) + +pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev); +pci_devfn_t pci_locate_device_on_bus(unsigned int pci_id, unsigned int bus); + #ifdef __SIMPLE_DEVICE__ unsigned int pci_find_next_capability(pci_devfn_t dev, unsigned int cap, unsigned int last); diff --git a/src/southbridge/amd/amd8111/bootblock.c b/src/southbridge/amd/amd8111/bootblock.c index 2c722c82b8..0abd999efe 100644 --- a/src/southbridge/amd/amd8111/bootblock.c +++ b/src/southbridge/amd/amd8111/bootblock.c @@ -17,6 +17,21 @@ #include #include #include +#include + +#define PCI_ID(VENDOR_ID, DEVICE_ID) \ + ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) + +static pci_devfn_t pci_io_locate_device(unsigned int pci_id, pci_devfn_t dev) +{ + for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { + unsigned int id; + id = pci_io_read_config32(dev, 0); + if (id == pci_id) + return dev; + } + return PCI_DEV_INVALID; +} /* Enable 5MB ROM access at 0xFFB00000 - 0xFFFFFFFF. */ static void amd8111_enable_rom(void) diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c index 41d9880f59..62ae99e414 100644 --- a/src/southbridge/amd/amd8111/reset.c +++ b/src/southbridge/amd/amd8111/reset.c @@ -16,6 +16,7 @@ #include #include +#include #include diff --git a/src/southbridge/amd/sb700/early_setup.c b/src/southbridge/amd/sb700/early_setup.c index 70cf340c8e..167986fa67 100644 --- a/src/southbridge/amd/sb700/early_setup.c +++ b/src/southbridge/amd/sb700/early_setup.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include "sb700.h" diff --git a/src/southbridge/broadcom/bcm5785/bootblock.c b/src/southbridge/broadcom/bcm5785/bootblock.c index 2861ff0cc1..62b20a3f7b 100644 --- a/src/southbridge/broadcom/bcm5785/bootblock.c +++ b/src/southbridge/broadcom/bcm5785/bootblock.c @@ -17,6 +17,21 @@ #include #include #include +#include + +#define PCI_ID(VENDOR_ID, DEVICE_ID) \ + ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) + +static pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev) +{ + for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { + unsigned int id; + id = pci_read_config32(dev, 0); + if (id == pci_id) + return dev; + } + return PCI_DEV_INVALID; +} /* Enable 4MB ROM access at 0xFFC00000 - 0xFFFFFFFF. */ static void bcm5785_enable_rom(void) diff --git a/src/southbridge/intel/i82371eb/bootblock.c b/src/southbridge/intel/i82371eb/bootblock.c index c59343df91..38b797d5a6 100644 --- a/src/southbridge/intel/i82371eb/bootblock.c +++ b/src/southbridge/intel/i82371eb/bootblock.c @@ -17,8 +17,23 @@ #include #include #include +#include #include "i82371eb.h" +#define PCI_ID(VENDOR_ID, DEVICE_ID) \ + ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF)) + +static pci_devfn_t pci_locate_device(unsigned int pci_id, pci_devfn_t dev) +{ + for (; dev <= PCI_DEV(255, 31, 7); dev += PCI_DEV(0, 0, 1)) { + unsigned int id; + id = pci_read_config32(dev, 0); + if (id == pci_id) + return dev; + } + return PCI_DEV_INVALID; +} + static void bootblock_southbridge_init(void) { u16 reg16; diff --git a/src/southbridge/intel/i82371eb/early_pm.c b/src/southbridge/intel/i82371eb/early_pm.c index 8ae7669f33..720cb0d013 100644 --- a/src/southbridge/intel/i82371eb/early_pm.c +++ b/src/southbridge/intel/i82371eb/early_pm.c @@ -16,6 +16,7 @@ #include #include +#include #include #include #include "i82371eb.h" diff --git a/src/southbridge/intel/i82371eb/early_smbus.c b/src/southbridge/intel/i82371eb/early_smbus.c index de16717416..4e91c0aabf 100644 --- a/src/southbridge/intel/i82371eb/early_smbus.c +++ b/src/southbridge/intel/i82371eb/early_smbus.c @@ -16,6 +16,7 @@ #include #include +#include #include #include #include diff --git a/src/southbridge/nvidia/ck804/early_smbus.c b/src/southbridge/nvidia/ck804/early_smbus.c index 51e200b598..f7bddbf674 100644 --- a/src/southbridge/nvidia/ck804/early_smbus.c +++ b/src/southbridge/nvidia/ck804/early_smbus.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include diff --git a/src/southbridge/nvidia/mcp55/early_smbus.c b/src/southbridge/nvidia/mcp55/early_smbus.c index a849ebab92..f52d079a12 100644 --- a/src/southbridge/nvidia/mcp55/early_smbus.c +++ b/src/southbridge/nvidia/mcp55/early_smbus.c @@ -19,6 +19,7 @@ #include #include +#include #include "smbus.h" #include "mcp55.h"