soc/mediatek/mt8188: Add eDP support for firmware display

MT8188 supports eDP as internal display interface.

BUG=b:244208960
TEST=emerge-geralt coreboot.

Signed-off-by: Bo-Chen Chen <rex-bc.chen@mediatek.com>
Change-Id: I6441a36557b097e041bc081b907eb60b56c9fbe6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68488
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Yidi Lin <yidilin@google.com>
This commit is contained in:
Bo-Chen Chen 2022-09-29 17:31:23 +08:00 committed by Yu-Ping Wu
parent 4ac8598f4b
commit 8a604bdbae
3 changed files with 17 additions and 0 deletions

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@ -33,6 +33,7 @@ ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c
ramstage-y += ../common/ddp.c ddp.c
ramstage-y += ../common/devapc.c devapc.c
ramstage-y += ../common/dfd.c
ramstage-y += ../common/dp/dp_intf.c ../common/dp/dptx.c ../common/dp/dptx_hal.c dp_intf.c
ramstage-y += ../common/dpm.c
ramstage-$(CONFIG_DPM_FOUR_CHANNEL) += ../common/dpm_4ch.c
ramstage-y += ../common/emi.c
@ -51,6 +52,7 @@ ramstage-y += ../common/usb.c usb.c
BL31_MAKEARGS += PLAT=mt8188
CPPFLAGS_common += -Isrc/soc/mediatek/mt8188/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/dp/include
CPPFLAGS_common += -Isrc/soc/mediatek/common/include
MT8188_BLOB_DIR := 3rdparty/blobs/soc/mediatek/mt8188

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@ -0,0 +1,13 @@
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
#include <soc/addressmap.h>
#include <soc/dp_intf.h>
const struct mtk_dpintf dpintf_data = {
.regs = (void *)(DP_INTF0_BASE),
.color_format = MTK_DPINTF_COLOR_FORMAT_RGB,
.yc_map = MTK_DPINTF_OUT_YC_MAP_RGB,
.bit_num = MTK_DPINTF_OUT_BIT_NUM_8BITS,
.channel_swap = MTK_DPINTF_OUT_CHANNEL_SWAP_RGB,
.input_mode = MTK_DPINTF_INPUT_MODE_1P,
};

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@ -96,9 +96,11 @@ enum {
DISP_GAMMA0_BASE = IO_PHYS + 0x0C006000,
DISP_DITHER0_BASE = IO_PHYS + 0x0C007000,
DISP_OVL1_BASE = IO_PHYS + 0x0C00A000,
DP_INTF0_BASE = IO_PHYS + 0x0C015000,
DISP_MUTEX_BASE = IO_PHYS + 0x0C016000,
DISP_POSTMASK0_BASE = IO_PHYS + 0x0C01A000,
VDOSYS0_BASE = IO_PHYS + 0x0C01D000,
SMI_LARB0 = IO_PHYS + 0x0C022000,
EDP_BASE = IO_PHYS + 0x0C500000,
};
#endif