GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling 

FSP already disables the PM ACPI timer, when EnableTcoTimer=0.

Test: clevo/l140cu and supermicro/x11ssm-f have the PM ACPI timer
disable bit set when EnableTcoTimer=0.

Change-Id: If370d3acf87ae6d1d7c64bf27228877cdd92ab2d
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45954
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Michael Niewöhner 2020-10-02 19:10:39 +02:00
parent 5df952bc2b
commit 8a64ad09a1
4 changed files with 0 additions and 25 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/soc/intel/cannonlake/Kconfig
View File

@ -98,7 +98,6 @@ config CPU_SPECIFIC_OPTIONS
select PLATFORM_USES_FSP2_0 select PLATFORM_USES_FSP2_0
select REG_SCRIPT select REG_SCRIPT
select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
select SOC_INTEL_COMMON select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK

13
src/soc/intel/cannonlake/finalize.c
View File

@ -56,21 +56,8 @@ static void pch_finalize(void)
*/ */
pch_thermal_configuration(); pch_thermal_configuration();
/*
* Disable ACPI PM timer based on dt policy
*
* Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
* Disabling ACPI PM timer also switches off TCO
*
* SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is
* just required to get to chip config. PCH_DEV_PMC is hidden by this
* point and hence removed from the root bus. pcidev_path_on_root thus
* returns NULL for PCH_DEV_PMC device.
*/
config = config_of_soc(); config = config_of_soc();
pmcbase = pmc_mmio_regs(); pmcbase = pmc_mmio_regs();
if (config->PmTimerDisabled)
pmc_disable_acpi_timer();
if (config->s0ix_enable && config->cppmvric2_adsposcdis) { if (config->s0ix_enable && config->cppmvric2_adsposcdis) {
/* Enable Audio DSP OSC qualification for S0ix */ /* Enable Audio DSP OSC qualification for S0ix */

1
src/soc/intel/skylake/Kconfig
View File

@ -43,7 +43,6 @@ config CPU_SPECIFIC_OPTIONS
select REG_SCRIPT select REG_SCRIPT
select SA_ENABLE_DPR select SA_ENABLE_DPR
select PMC_GLOBAL_RESET_ENABLE_LOCK select PMC_GLOBAL_RESET_ENABLE_LOCK
select PMC_LOW_POWER_MODE_PROGRAM
select SOC_INTEL_COMMON select SOC_INTEL_COMMON
select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK

10
src/soc/intel/skylake/finalize.c
View File

@ -62,16 +62,6 @@ static void pch_finalize_script(struct device *dev)
*/ */
pch_thermal_configuration(); pch_thermal_configuration();
/*
* Disable ACPI PM timer based on dt policy
*
* Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
* Disabling ACPI PM timer also switches off TCO
*/
if (config->PmTimerDisabled)
pmc_disable_acpi_timer();
/* we should disable Heci1 based on the devicetree policy */ /* we should disable Heci1 based on the devicetree policy */
if (config->HeciEnabled == 0) if (config->HeciEnabled == 0)
pch_disable_heci(); pch_disable_heci();