soc/intel/quark/bootblock: Remove clear_smi_and_wake_events
It is not used in this file. Change-Id: I59bb41370b97b79073c0fd82b1dbcae9fd8a62d0 Reported-by: GCC 6.1.0 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/15552 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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@ -21,15 +21,6 @@
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#include <soc/pci_devs.h>
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#include <soc/pci_devs.h>
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#include <soc/reg_access.h>
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#include <soc/reg_access.h>
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static const struct reg_script clear_smi_and_wake_events[] = {
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/* Clear any SMI or wake events */
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REG_GPE0_READ(R_QNC_GPE0BLK_GPE0S),
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REG_GPE0_READ(R_QNC_GPE0BLK_SMIS),
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REG_GPE0_OR(R_QNC_GPE0BLK_GPE0S, B_QNC_GPE0BLK_GPE0S_ALL),
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REG_GPE0_OR(R_QNC_GPE0BLK_SMIS, B_QNC_GPE0BLK_SMIS_ALL),
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REG_SCRIPT_END
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};
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static const struct reg_script legacy_gpio_init[] = {
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static const struct reg_script legacy_gpio_init[] = {
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/* Temporarily enable the legacy GPIO controller */
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/* Temporarily enable the legacy GPIO controller */
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REG_PCI_WRITE32(R_QNC_LPC_GBA_BASE, IO_ADDRESS_VALID
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REG_PCI_WRITE32(R_QNC_LPC_GBA_BASE, IO_ADDRESS_VALID
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