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soc/intel/xeon_sp/cpx: add CPUID for CPX-SP A1 processor 

Add CPUID for CPX-SP A1 (also called QS) processor.

DeltaLake DVT server uses CPX-SP A1 processor.

TESTED=booted DeltaLake DVT server to target OS.
[root@localhost ~]# dmidecode -t 1
Getting SMBIOS data from sysfs.
SMBIOS 3.0 present.

Handle 0x0001, DMI type 1, 27 bytes
System Information
	Manufacturer: Wiwynn
	Product Name: Delta Lake DVT
	Version: YoDL03
	Serial Number: BZA02200122N01A
	UUID: 000A0A22-2C29-1ED6-8259-000055DA2BFF
	Wake-up Type: Reserved
	SKU Number: Not Specified
	Family: DeltaLake

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: Ic8975f6bf752fd685b38b2d1f0a4da41983b57f6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44357
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Jonathan Zhang 2020-08-10 14:01:25 -07:00 committed by Angel Pons
parent cd08099908
commit 8aad2cafed
2 changed files with 2 additions and 0 deletions
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1
src/soc/intel/xeon_sp/cpx/cpu.c
View File

@ -100,6 +100,7 @@ static struct device_operations cpu_dev_ops = {
static const struct cpu_device_id cpu_table[] = { static const struct cpu_device_id cpu_table[] = {
{X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A0}, {X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A0},
{X86_VENDOR_INTEL, CPUID_COOPERLAKE_SP_A1},
{0, 0}, {0, 0},
}; };

1
src/soc/intel/xeon_sp/cpx/include/soc/cpu.h
View File

@ -7,6 +7,7 @@
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#define CPUID_COOPERLAKE_SP_A0 0x05065a #define CPUID_COOPERLAKE_SP_A0 0x05065a
#define CPUID_COOPERLAKE_SP_A1 0x05065b
/* CPU bus clock is fixed at 100MHz */ /* CPU bus clock is fixed at 100MHz */
#define CPU_BCLK 100 #define CPU_BCLK 100