From 8abf66e4e06412db08918dcde31f2d515040a409 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 8 Jul 2019 09:56:00 +0300 Subject: [PATCH] cpu/x86: Flip SMM_TSEG default MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is only a qualifier between TSEG and ASEG. Change-Id: I8051df92d9014e3574f6e7d5b6f1d6677fe77c82 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34135 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/cpu/intel/fsp_model_406dx/Kconfig | 1 + src/cpu/intel/haswell/Kconfig | 1 - src/cpu/intel/model_2065x/Kconfig | 1 - src/cpu/intel/model_206ax/Kconfig | 1 - src/cpu/intel/slot_1/Kconfig | 1 + src/cpu/x86/Kconfig | 17 ++++++++++++----- src/northbridge/intel/gm45/Kconfig | 1 - src/northbridge/intel/i945/Kconfig | 1 - src/northbridge/intel/pineview/Kconfig | 1 - src/northbridge/intel/x4x/Kconfig | 1 - src/soc/amd/picasso/Kconfig | 1 - src/soc/amd/stoneyridge/Kconfig | 1 - src/soc/intel/apollolake/Kconfig | 1 - src/soc/intel/baytrail/Kconfig | 1 - src/soc/intel/braswell/Kconfig | 1 - src/soc/intel/broadwell/Kconfig | 1 - src/soc/intel/cannonlake/Kconfig | 1 - src/soc/intel/denverton_ns/Kconfig | 1 - src/soc/intel/fsp_baytrail/Kconfig | 1 - src/soc/intel/fsp_broadwell_de/Kconfig | 1 - src/soc/intel/icelake/Kconfig | 1 - src/soc/intel/skylake/Kconfig | 1 - 22 files changed, 14 insertions(+), 24 deletions(-) diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig index f40842fce8..6bf8dc7eec 100644 --- a/src/cpu/intel/fsp_model_406dx/Kconfig +++ b/src/cpu/intel/fsp_model_406dx/Kconfig @@ -35,6 +35,7 @@ config CPU_SPECIFIC_OPTIONS select TSC_SYNC_MFENCE select LAPIC_MONOTONIC_TIMER select CPU_INTEL_COMMON + select NO_SMM # Microcode header files are delivered in FSP package select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 5936953b52..9cc040ec62 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -16,7 +16,6 @@ config CPU_SPECIFIC_OPTIONS select SSE2 select UDELAY_TSC select TSC_CONSTANT_RATE - select SMM_TSEG select SUPPORT_CPU_UCODE_IN_CBFS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/model_2065x/Kconfig b/src/cpu/intel/model_2065x/Kconfig index 0af0d35dda..089b3fead0 100644 --- a/src/cpu/intel/model_2065x/Kconfig +++ b/src/cpu/intel/model_2065x/Kconfig @@ -14,7 +14,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER - select SMM_TSEG select SUPPORT_CPU_UCODE_IN_CBFS select PARALLEL_CPU_INIT #select AP_IN_SIPI_WAIT diff --git a/src/cpu/intel/model_206ax/Kconfig b/src/cpu/intel/model_206ax/Kconfig index dbb8982121..2af63d6079 100644 --- a/src/cpu/intel/model_206ax/Kconfig +++ b/src/cpu/intel/model_206ax/Kconfig @@ -15,7 +15,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER - select SMM_TSEG select SUPPORT_CPU_UCODE_IN_CBFS #select AP_IN_SIPI_WAIT select TSC_SYNC_MFENCE diff --git a/src/cpu/intel/slot_1/Kconfig b/src/cpu/intel/slot_1/Kconfig index ab6663258f..890e33bbf8 100644 --- a/src/cpu/intel/slot_1/Kconfig +++ b/src/cpu/intel/slot_1/Kconfig @@ -25,6 +25,7 @@ config SLOT_SPECIFIC_OPTIONS # dummy select CPU_INTEL_MODEL_68X select CPU_INTEL_MODEL_6BX select CPU_INTEL_MODEL_6XX + select NO_SMM config DCACHE_RAM_BASE hex diff --git a/src/cpu/x86/Kconfig b/src/cpu/x86/Kconfig index d230a57e3f..8cc493ed55 100644 --- a/src/cpu/x86/Kconfig +++ b/src/cpu/x86/Kconfig @@ -93,18 +93,25 @@ config HAVE_SMI_HANDLER default n depends on (SMM_ASEG || SMM_TSEG) -config SMM_ASEG +config NO_SMM bool default n -config SMM_TSEG +config SMM_ASEG bool default n + depends on !NO_SMM + +config SMM_TSEG + bool + default y + depends on !(NO_SMM || SMM_ASEG) + +if SMM_TSEG config SMM_MODULE_HEAP_SIZE hex default 0x4000 - depends on SMM_TSEG help This option determines the size of the heap within the SMM handler modules. @@ -112,7 +119,6 @@ config SMM_MODULE_HEAP_SIZE config SMM_MODULE_STACK_SIZE hex default 0x400 - depends on SMM_TSEG help This option determines the size of the stack within the SMM handler modules. @@ -120,11 +126,12 @@ config SMM_MODULE_STACK_SIZE config SMM_STUB_STACK_SIZE hex default 0x400 - depends on SMM_TSEG help This option determines the size of the stack within the SMM handler modules. +endif + config SMM_LAPIC_REMAP_MITIGATION bool default y if NORTHBRIDGE_INTEL_I945 diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index f1318ebc93..c3d24820a5 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -28,7 +28,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select INTEL_GMA_SSC_ALTERNATE_REF select POSTCAR_STAGE select POSTCAR_CONSOLE - select SMM_TSEG select PARALLEL_MP select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 93251965c1..b151e8fb92 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -29,7 +29,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT select POSTCAR_STAGE select POSTCAR_CONSOLE - select SMM_TSEG select PARALLEL_MP select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index 2b4f502c61..37959dd2e6 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -30,7 +30,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select INTEL_GMA_ACPI select POSTCAR_STAGE select POSTCAR_CONSOLE - select SMM_TSEG select PARALLEL_MP select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select C_ENVIRONMENT_BOOTBLOCK diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 7cae91e324..ce43936c37 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -28,7 +28,6 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy select CACHE_MRC_SETTINGS select POSTCAR_STAGE select POSTCAR_CONSOLE - select SMM_TSEG select PARALLEL_MP select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index a930f60d27..048193e8c7 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -57,7 +57,6 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_MP select PARALLEL_MP_AP_WORK select HAVE_SMI_HANDLER - select SMM_TSEG select POSTCAR_STAGE select POSTCAR_CONSOLE select SSE2 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index ba82565bf4..f730cb2e1c 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -65,7 +65,6 @@ config CPU_SPECIFIC_OPTIONS select PARALLEL_MP select PARALLEL_MP_AP_WORK select HAVE_SMI_HANDLER - select SMM_TSEG select POSTCAR_STAGE select POSTCAR_CONSOLE select SSE2 diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 1f819eab06..4cddb586ed 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -63,7 +63,6 @@ config CPU_SPECIFIC_OPTIONS select PMC_INVALID_READ_AFTER_WRITE select PMC_GLOBAL_RESET_ENABLE_LOCK select REG_SCRIPT - select SMM_TSEG select SA_ENABLE_IMR select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 43c2906f15..4b816a20b6 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -24,7 +24,6 @@ config CPU_SPECIFIC_OPTIONS select PCIEXP_COMMON_CLOCK select REG_SCRIPT select RTC - select SMM_TSEG select SMP select SPI_FLASH select SSE2 diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index 920179f834..61bedb426e 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -34,7 +34,6 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK select SOC_INTEL_COMMON_BLOCK_HDA select SOC_INTEL_COMMON_RESET - select SMM_TSEG select SMP select SPI_FLASH select SSE2 diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 801800c5f4..3f7aef5e79 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -26,7 +26,6 @@ config CPU_SPECIFIC_OPTIONS select REG_SCRIPT select PARALLEL_MP select RTC - select SMM_TSEG select SMP select SPI_FLASH select SSE2 diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 5e405db4d8..48e5f6b83b 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -80,7 +80,6 @@ config CPU_SPECIFIC_OPTIONS select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT - select SMM_TSEG select SMP select SOC_AHCI_PORT_IMPLEMENTED_INVERT select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 273ce30d66..c230337449 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS select C_ENVIRONMENT_BOOTBLOCK select IOAPIC select HAVE_SMI_HANDLER - select SMM_TSEG select CACHE_MRC_SETTINGS select PARALLEL_MP select PCR_COMMON_IOSF_1_0 diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig index 26c95483c0..072df295a5 100644 --- a/src/soc/intel/fsp_baytrail/Kconfig +++ b/src/soc/intel/fsp_baytrail/Kconfig @@ -33,7 +33,6 @@ config CPU_SPECIFIC_OPTIONS select NO_RELOCATABLE_RAMSTAGE select PARALLEL_MP select REG_SCRIPT - select SMM_TSEG select SMP select SPI_FLASH select SSE2 diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig index f71148f6fe..0af2aad228 100644 --- a/src/soc/intel/fsp_broadwell_de/Kconfig +++ b/src/soc/intel/fsp_broadwell_de/Kconfig @@ -21,7 +21,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select SUPPORT_CPU_UCODE_IN_CBFS select INTEL_DESCRIPTOR_MODE_CAPABLE - select SMM_TSEG select HAVE_SMI_HANDLER select TSC_MONOTONIC_TIMER select TSC_CONSTANT_RATE diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index f0b291877d..db0f110cb7 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -37,7 +37,6 @@ config CPU_SPECIFIC_OPTIONS select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT - select SMM_TSEG select SMP select SOC_AHCI_PORT_IMPLEMENTED_INVERT select PMC_GLOBAL_RESET_ENABLE_LOCK diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index fb455d2392..ca690f41e8 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -50,7 +50,6 @@ config CPU_SPECIFIC_OPTIONS select PCIEX_LENGTH_64MB select REG_SCRIPT select SA_ENABLE_DPR - select SMM_TSEG select SMP select PMC_GLOBAL_RESET_ENABLE_LOCK select SOC_INTEL_COMMON