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superio/fintek: remove LDN-specific ops overrides 

The pnp ops struct is already passed to the pnp_enable_devices function and it
is used if no override is supplied in the elements of the pnp_info struct array

Change-Id: Ic6387032e043b6ad9e9ceefd2fcc1cdf843e2989
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/27387
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Felix Held 2018-07-06 21:43:34 +02:00
parent 72d77a9a0c
commit 8ac8ac635c
9 changed files with 70 additions and 70 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
src/superio/fintek/f71805f/superio.c
View File

@ -41,13 +41,13 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
{ &ops, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71805F_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71805F_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71805F_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ &ops, F71805F_GPIO, PNP_IRQ0, },
{ &ops, F71805F_PME, },
{ NULL, F71805F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71805F_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71805F_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71805F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71805F_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, F71805F_GPIO, PNP_IRQ0, },
{ NULL, F71805F_PME, },
};
static void enable_dev(struct device *dev)

14
src/superio/fintek/f71808a/superio.c
View File

@ -54,13 +54,13 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
{ &ops, F71808A_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71808A_HWM, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71808A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71808A_GPIO, PNP_IRQ0, },
{ &ops, F71808A_WDT, PNP_IO0, 0x07f8,},
{ &ops, F71808A_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71808A_PME, },
{ NULL, F71808A_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71808A_HWM, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71808A_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ NULL, F71808A_GPIO, PNP_IRQ0, },
{ NULL, F71808A_WDT, PNP_IO0, 0x07f8,},
{ NULL, F71808A_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71808A_PME, },
};
static void enable_dev(struct device *dev)

2
src/superio/fintek/f71859/superio.c
View File

@ -42,7 +42,7 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
{ &ops, F71859_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71859_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
};
static void enable_dev(struct device *dev)

20
src/superio/fintek/f71863fg/superio.c
View File

@ -50,16 +50,16 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
{ &ops, F71863FG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71863FG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71863FG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71863FG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71863FG_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ &ops, F71863FG_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71863FG_GPIO, },
{ &ops, F71863FG_VID, PNP_IO0, 0x07f8, },
{ &ops, F71863FG_SPI, },
{ &ops, F71863FG_PME, },
{ NULL, F71863FG_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71863FG_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71863FG_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71863FG_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71863FG_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, F71863FG_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ NULL, F71863FG_GPIO, },
{ NULL, F71863FG_VID, PNP_IO0, 0x07f8, },
{ NULL, F71863FG_SPI, },
{ NULL, F71863FG_PME, },
};
static void enable_dev(struct device *dev)

20
src/superio/fintek/f71869ad/superio.c
View File

@ -106,16 +106,16 @@ static struct device_operations ops = {
*
*/
static struct pnp_info pnp_dev_info[] = {
{ &ops, F71869AD_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71869AD_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71869AD_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71869AD_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71869AD_GPIO, },
{ &ops, F71869AD_WDT, },
{ &ops, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71869AD_PME, },
{ NULL, F71869AD_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71869AD_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71869AD_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71869AD_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ NULL, F71869AD_GPIO, },
{ NULL, F71869AD_WDT, },
{ NULL, F71869AD_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71869AD_PME, },
};
static void enable_dev(struct device *dev)

18
src/superio/fintek/f71872/superio.c
View File

@ -48,15 +48,15 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x07f8 etc. values may not be correct. */
{ &ops, F71872_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71872_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71872_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F71872_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F71872_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ &ops, F71872_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F71872_GPIO, PNP_IRQ0, },
{ &ops, F71872_VID, PNP_IO0, 0x0ff8, },
{ &ops, F71872_PM, },
{ NULL, F71872_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71872_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71872_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F71872_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F71872_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
{ NULL, F71872_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ NULL, F71872_GPIO, PNP_IRQ0, },
{ NULL, F71872_VID, PNP_IO0, 0x0ff8, },
{ NULL, F71872_PM, },
};
static void enable_dev(struct device *dev)

10
src/superio/fintek/f81216h/superio.c
View File

@ -94,11 +94,11 @@ static struct device_operations ops = {
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, F81216H_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F81216H_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F81216H_SP3, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F81216H_SP4, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ &ops, F81216H_WDT, },
{ NULL, F81216H_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F81216H_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F81216H_SP3, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F81216H_SP4, PNP_IO0 | PNP_IRQ0, 0x07f8, },
{ NULL, F81216H_WDT, },
};
static void enable_dev(struct device *dev)

16
src/superio/fintek/f81865f/superio.c
View File

@ -48,14 +48,14 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x7f8 etc. values may not be correct. */
{ &ops, F81865F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F81865F_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81865F_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81865F_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F81865F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F81865F_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
{ &ops, F81865F_GPIO, PNP_IRQ0, },
{ &ops, F81865F_PME, },
{ NULL, F81865F_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F81865F_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81865F_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81865F_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ NULL, F81865F_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F81865F_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
{ NULL, F81865F_GPIO, PNP_IRQ0, },
{ NULL, F81865F_PME, },
};
static void enable_dev(struct device *dev)

26
src/superio/fintek/f81866d/superio.c
View File

@ -70,19 +70,19 @@ static struct device_operations ops = {
static struct pnp_info pnp_dev_info[] = {
/* TODO: Some of the 0x7f8 etc. values may not be correct. */
{ &ops, F81866D_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F81866D_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81866D_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81866D_SP3, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81866D_SP4, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81866D_SP5, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81866D_SP6, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ &ops, F81866D_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ &ops, F81866D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ &ops, F81866D_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
{ &ops, F81866D_GPIO, PNP_IRQ0, },
{ &ops, F81866D_PME, },
{ &ops, F81866D_WDT, },
{ NULL, F81866D_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F81866D_SP1, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81866D_SP2, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81866D_SP3, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81866D_SP4, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81866D_SP5, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81866D_SP6, PNP_IO0 | PNP_IRQ0, 0x7f8, },
{ NULL, F81866D_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, 0x07ff, },
{ NULL, F81866D_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
{ NULL, F81866D_HWM, PNP_IO0 | PNP_IRQ0, 0xff8, },
{ NULL, F81866D_GPIO, PNP_IRQ0, },
{ NULL, F81866D_PME, },
{ NULL, F81866D_WDT, },
};
static void enable_dev(struct device *dev)