Nvidia boards: acpi_tables.c: Remove intermediate variable in ACPI interrupt routing initialization

Change-Id: I6cb4ad5ea5ad40284f8e88ff440f2605d3b83359
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Reviewed-on: http://review.coreboot.org/3959
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins)
This commit is contained in:
Jonathan A. Kollasch 2013-10-11 13:50:04 -05:00
parent 4f9bf7e2fb
commit 8ad6e78778
4 changed files with 23 additions and 63 deletions

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@ -65,17 +65,9 @@ unsigned long acpi_fill_madt(unsigned long current)
/* Initialize interrupt mapping if mptable.c didn't. */
#if (!CONFIG_GENERATE_MP_TABLE)
#error untested config
{
u32 dword;
dword = 0x0120d218;
pci_write_config32(dev, 0x7c, dword);
dword = 0x12008a00;
pci_write_config32(dev, 0x80, dword);
dword = 0x0000007d;
pci_write_config32(dev, 0x84, dword);
}
pci_write_config32(dev, 0x7c, 0x0120d218);
pci_write_config32(dev, 0x80, 0x12008a00);
pci_write_config32(dev, 0x84, 0x0000007d);
#endif
}

View File

@ -43,19 +43,11 @@ unsigned long acpi_fill_madt(unsigned long current)
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
apic_addr, 0);
/* Initialize interrupt mapping if mptable.c didn't. */
#if (!CONFIG_GENERATE_MP_TABLE)
{
u32 dword;
dword = 0x0120d218;
pci_write_config32(dev, 0x7c, dword);
dword = 0x12008a00;
pci_write_config32(dev, 0x80, dword);
dword = 0x0000007d;
pci_write_config32(dev, 0x84, dword);
}
#endif
#if (!CONFIG_GENERATE_MP_TABLE)
pci_write_config32(dev, 0x7c, 0x0120d218);
pci_write_config32(dev, 0x80, 0x12008a00);
pci_write_config32(dev, 0x84, 0x0000007d);
#endif
}
/* Write AMD 8131 two IOAPICs. */

View File

@ -43,19 +43,11 @@ unsigned long acpi_fill_madt(unsigned long current)
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
apic_addr, 0);
/* Initialize interrupt mapping if mptable.c didn't. */
#if (!CONFIG_GENERATE_MP_TABLE)
{
u32 dword;
dword = 0x0120d218;
pci_write_config32(dev, 0x7c, dword);
dword = 0x12008a00;
pci_write_config32(dev, 0x80, dword);
dword = 0x0000007d;
pci_write_config32(dev, 0x84, dword);
}
#endif
#if (!CONFIG_GENERATE_MP_TABLE)
pci_write_config32(dev, 0x7c, 0x0120d218);
pci_write_config32(dev, 0x80, 0x12008a00);
pci_write_config32(dev, 0x84, 0x0000007d);
#endif
}
/* Write AMD 8131 two IOAPICs. */

View File

@ -43,19 +43,11 @@ unsigned long acpi_fill_madt(unsigned long current)
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 4,
apic_addr, 0);
/* Initialize interrupt mapping if mptable.c didn't. */
#if (!CONFIG_GENERATE_MP_TABLE)
{
u32 dword;
dword = 0x0120d218;
pci_write_config32(dev, 0x7c, dword);
dword = 0x12008a00;
pci_write_config32(dev, 0x80, dword);
dword = 0x00080d7d;
pci_write_config32(dev, 0x84, dword);
}
#endif
#if (!CONFIG_GENERATE_MP_TABLE)
pci_write_config32(dev, 0x7c, 0x0120d218);
pci_write_config32(dev, 0x80, 0x12008a00);
pci_write_config32(dev, 0x84, 0x00080d7d);
#endif
}
/* Write AMD 8131 two IOAPICs. */
@ -80,19 +72,11 @@ unsigned long acpi_fill_madt(unsigned long current)
current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current, 7,
apic_addr, 0x20);
/* Initialize interrupt mapping if mptable.c didn't. */
#if (!CONFIG_GENERATE_MP_TABLE)
{
u32 dword;
dword = 0x0000d218; // Why does the factory BIOS have 0?
pci_write_config32(dev, 0x7c, dword);
dword = 0x00000000;
pci_write_config32(dev, 0x80, dword);
dword = 0x00000d00; // Same here.
pci_write_config32(dev, 0x84, dword);
}
#endif
#if (!CONFIG_GENERATE_MP_TABLE)
pci_write_config32(dev, 0x7c, 0x0000d218); // Why does the factory BIOS have 0?
pci_write_config32(dev, 0x80, 0x00000000);
pci_write_config32(dev, 0x84, 0x00000d00); // Same here.
#endif
}
/* IRQ9 */