soc/intel/common: Fix typo mistake in cache_as_ram.S
Change-Id: I14c0e87012bdbaaff50844ed097b66e2221b1e08 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34818 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: V Sowmya <v.sowmya@intel.com>
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@ -365,7 +365,7 @@ find_llc_subleaf:
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jnz find_llc_subleaf
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jnz find_llc_subleaf
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/*
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/*
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* Set MSR 0xC91 IA32_L3_MASK_! = 0xE/0xFE/0xFFE/0xFFFE
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* Set MSR 0xC91 IA32_L3_MASK_1 = 0xE/0xFE/0xFFE/0xFFFE
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* for 4/8/16 way of LLC
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* for 4/8/16 way of LLC
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*/
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*/
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shr $22, %ebx
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shr $22, %ebx
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