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cpu/intel/haswell: Clean up CPUID definitions 

The `mobile` suffix is misleading, since desktop CPUs share the same
CPUIDs. Remove unused stepping IDs and add the full CPUIDs instead.
Finally, add Broadwell CPUIDs in preparation for merging CPU code.
Note that steppings for Haswell in various comments are incorrect.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: I19e56b8826b1514550ae95e6363b0df2d08e3cb7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46915
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2020-10-28 21:48:29 +01:00 committed by Patrick Georgi
parent 8e6f162cc0
commit 8b0636e06f
2 changed files with 31 additions and 18 deletions
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35
src/cpu/intel/haswell/haswell.h
View File

@ -5,19 +5,32 @@
#include <stdint.h> #include <stdint.h>
/* Haswell CPU types */ /* CPU types without stepping */
#define HASWELL_FAMILY_MOBILE 0x306c0 #define HASWELL_FAMILY_TRAD 0x306c0
#define HASWELL_FAMILY_ULT 0x40650 #define HASWELL_FAMILY_ULT 0x40650
#define CRYSTALWELL_FAMILY 0x306c0
#define BROADWELL_FAMILY_ULT 0x306d0
/* Haswell CPU steppings */ /* Haswell CPUIDs */
#define HASWELL_STEPPING_MOBILE_A0 1 #define CPUID_HASWELL_A0 0x306c1
#define HASWELL_STEPPING_MOBILE_B0 2 #define CPUID_HASWELL_B0 0x306c2
#define HASWELL_STEPPING_MOBILE_C0 3 #define CPUID_HASWELL_C0 0x306c3
#define HASWELL_STEPPING_MOBILE_D0 4
#define HASWELL_STEPPING_ULT_B0 0
#define HASWELL_STEPPING_ULT_C0 1
/* Haswell bus clock is fixed at 100MHz */ #define CPUID_HASWELL_ULT_B0 0x40650
#define CPUID_HASWELL_ULT_C0 0x40651
/* Crystalwell CPUIDs */
#define CPUID_CRYSTALWELL_B0 0x40660
#define CPUID_CRYSTALWELL_C0 0x40661
/* Broadwell CPUIDs */
#define CPUID_BROADWELL_C0 0x40671
#define CPUID_BROADWELL_ULT_C0 0x306d2
#define CPUID_BROADWELL_ULT_D0 0x306d3
#define CPUID_BROADWELL_ULT_E0 0x306d4
/* Haswell and Broadwell bus clock is fixed at 100MHz */
#define CPU_BCLK 100 #define CPU_BCLK 100
#define MSR_CORE_THREAD_COUNT 0x35 #define MSR_CORE_THREAD_COUNT 0x35

14
src/cpu/intel/haswell/haswell_init.c
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@ -689,13 +689,13 @@ static struct device_operations cpu_dev_ops = {
}; };
static const struct cpu_device_id cpu_table[] = { static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, 0x306c1 }, /* Intel Haswell 4+2 A0 */ { X86_VENDOR_INTEL, CPUID_HASWELL_A0 },
{ X86_VENDOR_INTEL, 0x306c2 }, /* Intel Haswell 4+2 B0 */ { X86_VENDOR_INTEL, CPUID_HASWELL_B0 },
{ X86_VENDOR_INTEL, 0x306c3 }, /* Intel Haswell C0 */ { X86_VENDOR_INTEL, CPUID_HASWELL_C0 },
{ X86_VENDOR_INTEL, 0x40650 }, /* Intel Haswell ULT B0 */ { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_B0 },
{ X86_VENDOR_INTEL, 0x40651 }, /* Intel Haswell ULT B1 */ { X86_VENDOR_INTEL, CPUID_HASWELL_ULT_C0 },
{ X86_VENDOR_INTEL, 0x40660 }, /* Intel Crystal Well C0 */ { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_B0 },
{ X86_VENDOR_INTEL, 0x40661 }, /* Intel Crystal Well C1 */ { X86_VENDOR_INTEL, CPUID_CRYSTALWELL_C0 },
{ 0, 0 }, { 0, 0 },
}; };