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soc/amd/sabrina: Re-init eSPI in bootblock 

Currently bootblock does not initialize eSPI if it is already done in
PSP verstage. But some other component is clobbering the eSPI
configuration causing timeouts in EC communication after the boot flow
hits x86. To workaround this issue, re-initialize eSPI in bootblock.

BUG=b:217414563
TEST=Build and boot to OS in Skyrim with PSP verstage.

Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I41c0b2816a106a6a547f3cb372693e1bb7f23734
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66443
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Karthikeyan Ramasubramanian 2022-08-04 14:11:07 -06:00 committed by Martin L Roth
parent 1c718519f4
commit 8b1c6c6cb3
1 changed files with 3 additions and 3 deletions
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6
src/soc/amd/sabrina/early_fch.c
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@ -42,9 +42,9 @@ void fch_pre_init(void)
/* Setup SPI base by calling lpc_early_init before setting up eSPI. */
lpc_early_init();
/* Setup eSPI to enable port80 routing if the board is using eSPI and the eSPI
interface hasn't already been set up in verstage on PSP */
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK))
/* Setup eSPI to enable port80 routing if the board is using eSPI.
TODO(b/241426419): Setup eSPI if it is not already done in verstage on PSP. */
if (CONFIG(SOC_AMD_COMMON_BLOCK_USE_ESPI))
configure_espi_with_mb_hook();
fch_spi_early_init();