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soc/intel/fsp_broadwell_de: Add definition for LGMR 

Add definition for LPC Generic Memory Range register.

Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I7c76bacdf692e72849547106f29b614345f505c1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51716
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Jonathan Zhang 2021-03-22 16:12:05 -07:00 committed by Patrick Georgi
parent 570ae23516
commit 8b22c55855
1 changed files with 1 additions and 0 deletions
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src/soc/intel/fsp_broadwell_de/include/soc/lpc.h
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@ -37,6 +37,7 @@
#define LPC_GEN2_DEC 0x88 #define LPC_GEN2_DEC 0x88
#define LPC_GEN3_DEC 0x8c #define LPC_GEN3_DEC 0x8c
#define LPC_GEN4_DEC 0x90 #define LPC_GEN4_DEC 0x90
#define LGMR 0x98 /* LPC Generic Memory Range */
#define GEN_PMCON_1 0xA0 #define GEN_PMCON_1 0xA0
#define SMI_LOCK (1 << 4) #define SMI_LOCK (1 << 4)
#define SMI_LOCK_GP6 (1 << 5) #define SMI_LOCK_GP6 (1 << 5)