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mb/google/dedede/var/dibbi: Enable USB2 port 6 

USB2 port 6 may be used for a PL2303 USB to UART bridge, so enable the
port.

BUG=b:269690930
TEST=kernel can detect a PL2303 USB device
BRANCH=dedede

Change-Id: I0ba421c3a502e69d101de40bbd31122211d3fb05
Signed-off-by: Sam McNally <sammc@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73125
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
This commit is contained in:
Sam McNally 2023-02-20 14:05:54 +11:00 committed by Eric Lai
parent 2e6fa8206e
commit 8b4154c1d2
1 changed files with 1 additions and 0 deletions
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src/mainboard/google/dedede/variants/dibbi/overridetree.cb
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@ -53,6 +53,7 @@ chip soc/intel/jasperlake
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A2
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A3
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # PL2303
register "usb3_ports[1]" = "USB3_PORT_EMPTY" # No USB3/2 Type-C Port C1
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A2