drivers: Replace set_vbe_mode_info_valid
Currently it's not possible to add multiple graphics driver into one coreboot image. This patch series will fix this issue by providing a single API that multiple graphics driver can use. This is required for platforms that have two graphic cards, but different graphic drivers, like Intel+Aspeed on server platforms or Intel+Nvidia on consumer notebooks. The goal is to remove duplicated fill_fb_framebuffer(), the advertisment of multiple indepent framebuffers in coreboot tables, and better runtime/build time graphic configuration options. Replace set_vbe_mode_info_valid with fb_add_framebuffer_info or fb_new_framebuffer_info_from_edid. Change-Id: I95d1d62385a201c68c6c2527c023ad2292a235c5 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39004 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
parent
6c04b353c5
commit
8b56c8c6b2
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@ -6,6 +6,7 @@
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#include <console/console.h>
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#include <edid.h>
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#include <device/pci_def.h>
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#include <framebuffer_info.h>
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#include "ast_drv.h"
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@ -200,7 +201,7 @@ int ast_driver_framebuffer_init(struct drm_device *dev, int flags)
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return ret;
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}
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/* Updated edid for set_vbe_mode_info_valid */
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/* Updated edid for fb_fill_framebuffer_info */
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edid.x_resolution = edid.mode.ha;
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edid.y_resolution = edid.mode.va;
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edid.framebuffer_bits_per_pixel = format.cpp[0] * 8;
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@ -227,7 +228,7 @@ int ast_driver_framebuffer_init(struct drm_device *dev, int flags)
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ast_hide_cursor(&crtc);
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/* Advertise new mode */
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set_vbe_mode_info_valid(&edid, fb.mmio_addr);
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fb_new_framebuffer_info_from_edid(&edid, fb.mmio_addr);
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/* Clear display */
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memset((void *)(uintptr_t)fb.mmio_addr, 0, edid.bytes_per_line * edid.y_resolution);
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@ -1,7 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <stdint.h>
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#include <edid.h>
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#include <arch/io.h>
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#include <console/console.h>
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#include <device/device.h>
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@ -10,6 +9,7 @@
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#include <device/pci_ids.h>
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#include <pc80/vga.h>
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#include <pc80/vga_io.h>
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#include <framebuffer_info.h>
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/* VGA init. We use the Bochs VESA VBE extensions */
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#define VBE_DISPI_IOPORT_INDEX 0x01CE
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@ -82,7 +82,6 @@ static struct resource res_legacy = {
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static void bochs_init_linear_fb(struct device *dev)
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{
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struct edid edid;
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struct resource *res_fb, *res_io;
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int id, mem, bar;
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@ -139,13 +138,8 @@ static void bochs_init_linear_fb(struct device *dev)
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bochs_vga_write(res_io, 0, 0x20); /* disable blanking */
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/* setup coreboot framebuffer */
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edid.mode.ha = width;
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edid.mode.va = height;
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edid.panel_bits_per_color = 8;
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edid.panel_bits_per_pixel = 24;
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edid_set_framebuffer_bits_per_pixel(&edid, 32, 0);
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set_vbe_mode_info_valid(&edid, res_fb->base);
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/* Advertise new mode */
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fb_add_framebuffer_info(res_fb->base, width, height, 4 * width, 32);
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}
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static void bochs_init_text_mode(struct device *dev)
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@ -1,13 +1,13 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <stdint.h>
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#include <edid.h>
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#include <console/console.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <device/pci_ops.h>
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#include <pc80/vga.h>
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#include <pc80/vga_io.h>
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#include <framebuffer_info.h>
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static int width = CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES;
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static int height = CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES;
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@ -299,13 +299,7 @@ static void cirrus_init_linear_fb(struct device *dev)
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vga_sr_write (CIRRUS_SR_EXTENDED_MODE, sr_ext);
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write_hidden_dac (hidden_dac);
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struct edid edid;
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edid.mode.ha = width;
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edid.mode.va = height;
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edid.panel_bits_per_color = 8;
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edid.panel_bits_per_pixel = 24;
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edid_set_framebuffer_bits_per_pixel(&edid, 32, 0);
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set_vbe_mode_info_valid(&edid, addr);
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fb_add_framebuffer_info(addr, width, height, 4 * width, 32);
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}
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static void cirrus_init_text_mode(struct device *dev)
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@ -96,8 +96,6 @@ enum edid_status {
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int decode_edid(unsigned char *edid, int size, struct edid *out);
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void edid_set_framebuffer_bits_per_pixel(struct edid *edid, int fb_bpp,
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int row_byte_alignment);
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struct fb_info *set_vbe_mode_info_valid(const struct edid *edid, uintptr_t fb_addr);
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void set_vbe_framebuffer_orientation(enum lb_fb_orientation orientation);
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int set_display_mode(struct edid *edid, enum edid_modes mode);
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#endif /* EDID_H */
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@ -19,4 +19,8 @@ struct fb_info *fb_add_framebuffer_info(uintptr_t fb_addr, uint32_t x_resolution
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void fb_set_orientation(struct fb_info *info,
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enum lb_fb_orientation orientation);
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struct edid;
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struct fb_info *fb_new_framebuffer_info_from_edid(const struct edid *edid,
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uintptr_t fb_addr);
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#endif /* __FRAMEBUFFER_INFO_H_ */
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@ -153,7 +153,8 @@ void fb_set_orientation(struct fb_info *info, enum lb_fb_orientation orientation
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/*
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* Take an edid, and create a framebuffer.
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*/
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struct fb_info *set_vbe_mode_info_valid(const struct edid *edid, uintptr_t fb_addr)
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struct fb_info *fb_new_framebuffer_info_from_edid(const struct edid *edid,
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uintptr_t fb_addr)
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{
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return fb_add_framebuffer_info(fb_addr, edid->x_resolution, edid->y_resolution,
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edid->bytes_per_line, edid->framebuffer_bits_per_pixel);
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@ -4,15 +4,14 @@
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#include <device/device.h>
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#include <cbmem.h>
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#include <halt.h>
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#include <edid.h>
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#include <device/mmio.h>
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#include <ramdetect.h>
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#include <symbols.h>
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#include <framebuffer_info.h>
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static void init_gfx(void)
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{
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uint32_t *pl111;
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struct edid edid;
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/* width is at most 4096 */
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/* height is at most 1024 */
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int width = 800, height = 600;
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@ -28,12 +27,7 @@ static void init_gfx(void)
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write32(pl111 + 10, 0xff);
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write32(pl111 + 6, (5 << 1) | 0x801);
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edid.framebuffer_bits_per_pixel = 32;
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edid.bytes_per_line = width * 4;
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edid.x_resolution = width;
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edid.y_resolution = height;
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set_vbe_mode_info_valid(&edid, framebuffer);
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fb_add_framebuffer_info(framebuffer, width, height, 4 * width, 32);
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}
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static void mainboard_enable(struct device *dev)
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@ -8,6 +8,7 @@
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#include <device/mmio.h>
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#include <drivers/analogix/anx7625/anx7625.h>
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#include <edid.h>
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#include <framebuffer_info.h>
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#include <gpio.h>
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#include <soc/ddp.h>
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#include <soc/dpm.h>
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@ -124,7 +125,7 @@ static bool configure_display(void)
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return false;
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}
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mtk_ddp_mode_set(&edid);
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set_vbe_mode_info_valid(&edid, 0);
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fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0);
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return true;
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}
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@ -7,7 +7,6 @@
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#include <device/device.h>
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#include <device/i2c_simple.h>
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#include <drivers/ti/tps65090/tps65090.h>
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#include <edid.h>
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#include <soc/clk.h>
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#include <soc/dp.h>
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#include <soc/dp-core.h>
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#include <soc/tmu.h>
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#include <soc/usb.h>
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#include <symbols.h>
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#include <framebuffer_info.h>
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#include "exynos5250.h"
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#define DRAM_SIZE CONFIG_DRAM_SIZE_MB
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#define DRAM_END (DRAM_START + DRAM_SIZE) /* plus one... */
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static struct edid edid = {
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.mode.ha = 1366,
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.mode.va = 768,
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.framebuffer_bits_per_pixel = 16,
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.x_resolution = 1366,
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.y_resolution = 768,
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.bytes_per_line = 2 * 1366
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};
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/* TODO: transplanted DP stuff, clean up once we have something that works */
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static enum exynos5_gpio_pin dp_pd_l = GPIO_Y25; /* active low */
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static enum exynos5_gpio_pin dp_rst_l = GPIO_X15; /* active low */
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sdmmc_vdd();
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set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr);
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fb_add_framebuffer_info((uintptr_t)fb_addr, 1366, 768, 2 * 1366, 16);
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lcd_vdd();
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return false;
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}
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mtk_ddp_mode_set(edid);
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struct fb_info *info = set_vbe_mode_info_valid(edid, 0);
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struct fb_info *info = fb_new_framebuffer_info_from_edid(edid, 0);
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if (info)
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fb_set_orientation(info, panel->s->orientation);
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#include <soc/pll.h>
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#include <soc/usb.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <framebuffer_info.h>
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enum {
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CODEC_I2C_BUS = 0,
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}
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mtk_ddp_mode_set(&edid);
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set_vbe_mode_info_valid(&edid, (uintptr_t)0);
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fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0);
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}
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static void mainboard_init(struct device *dev)
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#include <device/i2c_simple.h>
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#include <drivers/parade/ps8625/ps8625.h>
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#include <ec/google/chromeec/ec.h>
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#include <edid.h>
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#include <soc/tmu.h>
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#include <soc/clk.h>
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#include <soc/cpu.h>
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#include <string.h>
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#include <symbols.h>
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#include <vbe.h>
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#include <framebuffer_info.h>
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/* convenient shorthand (in MB) */
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#define DRAM_START ((uintptr_t)_dram/MiB)
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#define DRAM_SIZE CONFIG_DRAM_SIZE_MB
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static struct edid edid = {
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.mode.ha = 1366,
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.mode.va = 768,
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.framebuffer_bits_per_pixel = 16,
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.x_resolution = 1366,
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.y_resolution = 768,
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.bytes_per_line = 2 * 1366
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};
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/* from the fdt */
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static struct vidinfo vidinfo = {
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.vl_freq = 60,
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sdmmc_vdd();
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set_vbe_mode_info_valid(&edid, (uintptr_t)fb_addr);
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fb_add_framebuffer_info((uintptr_t)fb_addr, 1366, 768, 2 * 1366, 16);
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/*
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* The reset value for FIMD SYSMMU register MMU_CTRL:0x14640000
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@ -6,6 +6,7 @@
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#include <device/device.h>
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#include <device/i2c_simple.h>
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#include <drivers/ti/sn65dsi86bridge/sn65dsi86bridge.h>
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#include <framebuffer_info.h>
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#include <soc/display/mipi_dsi.h>
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#include <soc/display/mdssreg.h>
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#include <soc/qupv3_config.h>
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/* Configure backlight */
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gpio_output(GPIO_BACKLIGHT_ENABLE, 1);
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display_init(&ed);
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set_vbe_mode_info_valid(&ed, (uintptr_t)0);
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fb_new_framebuffer_info_from_edid(&ed, (uintptr_t)0);
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} else
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printk(BIOS_INFO, "Skipping display init.\n");
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}
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#include <pc80/vga_io.h>
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#include <commonlib/helpers.h>
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#include <types.h>
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#include <framebuffer_info.h>
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#include "i945.h"
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#include "chip.h"
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(void *)pgfx, hactive * vactive * 4);
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memset((void *)pgfx, 0x00, hactive * vactive * 4);
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set_vbe_mode_info_valid(&edid, pgfx);
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fb_new_framebuffer_info_from_edid(&edid, pgfx);
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} else {
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vga_misc_write(0x67);
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#include <soc/nvidia/tegra/pwm.h>
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#include <stdint.h>
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#include <string.h>
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#include <framebuffer_info.h>
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#include "chip.h"
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/* tell depthcharge ...
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*/
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struct edid edid;
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edid.mode.va = config->yres;
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edid.mode.ha = config->xres;
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edid_set_framebuffer_bits_per_pixel(&edid,
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config->framebuffer_bits_per_pixel, 32);
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set_vbe_mode_info_valid(&edid, (uintptr_t)(framebuffer_base_mb*MiB));
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const uint32_t bytes_per_line = ALIGN_UP(config->xres *
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DIV_ROUND_UP(config->framebuffer_bits_per_pixel, 8), 32);
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fb_add_framebuffer_info(framebuffer_base_mb*MiB, config->xres, config->yres,
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bytes_per_line, config->framebuffer_bits_per_pixel);
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}
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#include <console/console.h>
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#include <device/mmio.h>
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#include <stdint.h>
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#include <edid.h>
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#include <device/device.h>
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#include <soc/nvidia/tegra/dc.h>
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#include <soc/display.h>
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#include <framebuffer_info.h>
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#include "chip.h"
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void pass_mode_info_to_payload(
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struct soc_nvidia_tegra210_config *config)
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{
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struct edid edid;
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edid.mode.va = config->display_yres;
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edid.mode.ha = config->display_xres;
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edid_set_framebuffer_bits_per_pixel(&edid,
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config->framebuffer_bits_per_pixel, 64);
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printk(BIOS_INFO, "%s: bytes_per_line: %d, bits_per_pixel: %d\n "
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" x_res x y_res: %d x %d, size: %d\n",
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__func__, edid.bytes_per_line,
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edid.framebuffer_bits_per_pixel,
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edid.x_resolution, edid.y_resolution,
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(edid.bytes_per_line * edid.y_resolution));
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set_vbe_mode_info_valid(&edid, 0);
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const uint32_t bytes_per_line = ALIGN_UP(config->display_xres *
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DIV_ROUND_UP(config->framebuffer_bits_per_pixel, 8), 64);
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/* The framebuffer address is zero to let the payload allocate it */
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fb_add_framebuffer_info(0, config->display_xres, config->display_yres,
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bytes_per_line, config->framebuffer_bits_per_pixel);
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}
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#include <soc/grf.h>
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#include <soc/soc.h>
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#include <soc/vop.h>
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#include <framebuffer_info.h>
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#include "chip.h"
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break;
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}
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set_vbe_mode_info_valid(&edid, (uintptr_t)lcdbase);
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fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)lcdbase);
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}
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#include <soc/mipi.h>
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#include <soc/soc.h>
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#include <soc/vop.h>
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#include <framebuffer_info.h>
|
||||
|
||||
#include "chip.h"
|
||||
|
||||
|
@ -160,7 +161,7 @@ retry_edp:
|
|||
break;
|
||||
}
|
||||
mainboard_power_on_backlight();
|
||||
set_vbe_mode_info_valid(&edid, (uintptr_t)0);
|
||||
fb_new_framebuffer_info_from_edid(&edid, (uintptr_t)0);
|
||||
|
||||
return;
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue