soc/intel/alderlake: Add GFx Device ID 0x46b3

List of changes:
1. Add new GFx ID 0x46B3 into device/pci_ids.h
2. Update new GFx ID into common graphics.c
3. Add new GFx ID description into report_platform.c

TEST=Build and boot brya

Signed-off-by: Meera Ravindranath <meera.ravindranath@intel.com>
Change-Id: I4343c7343875eb40c2955f6f4dd98d6446852dc0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55662
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>

src/include/device/pci_ids.h

@@ -3817,6 +3817,7 @@
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_2			0x46a1
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3			0x46a3
 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_4			0x46a8
+#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_5			0x46b3
 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1			0x4680
 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1			0x46c0
 

src/soc/intel/alderlake/bootblock/report_platform.c

@@ -104,6 +104,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
+	{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
 	{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
 };
 

src/soc/intel/common/block/graphics/graphics.c

@@ -300,6 +300,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_2,
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_3,
 	PCI_DEVICE_ID_INTEL_ADL_P_GT2_4,
+	PCI_DEVICE_ID_INTEL_ADL_P_GT2_5,
 	PCI_DEVICE_ID_INTEL_ADL_S_GT1,
 	PCI_DEVICE_ID_INTEL_ADL_M_GT1,
 	0,