util/msrtool: Fix names from IA32_MCO_xx to IA32_MC0_xx
Change-Id: I46cd986f4914b214156da49db37ecfa749386ce8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/26268 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -176,13 +176,13 @@ const struct msrdef intel_atom_msrs[] = {
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}},
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{ BITS_EOT }
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}},
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{0x400, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_CTL", "", {
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{0x400, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_CTL", "", {
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{ BITS_EOT }
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}},
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{0x401, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_STATUS", "", {
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{0x401, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_STATUS", "", {
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{ BITS_EOT }
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}},
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{0x402, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_ADDR", "", {
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{0x402, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_ADDR", "", {
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{ BITS_EOT }
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}},
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{0x404, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC1_CTL", "", {
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@ -1057,13 +1057,13 @@ const struct msrdef intel_core2_later_msrs[] = {
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}},
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{ BITS_EOT }
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}},
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{0x400, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_CTL", "", {
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{0x400, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_CTL", "", {
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{ BITS_EOT }
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}},
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{0x401, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_STATUS", "", {
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{0x401, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_STATUS", "", {
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{ BITS_EOT }
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}},
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{0x402, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_ADDR", "", {
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{0x402, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_ADDR", "", {
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{ BITS_EOT }
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}},
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{0x403, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_MISC", "", {
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@ -1621,13 +1621,13 @@ const struct msrdef intel_nehalem_msrs[] = {
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}},
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{ BITS_EOT }
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}},
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{0x400, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_CTL", "", {
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{0x400, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_CTL", "", {
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{ BITS_EOT }
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}},
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{0x401, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_STATUS", "", {
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{0x401, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_STATUS", "", {
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{ BITS_EOT }
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}},
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{0x402, MSRTYPE_RDWR, MSR2(0,0), "IA32_MCO_ADDR", "", {
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{0x402, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_ADDR", "", {
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{ BITS_EOT }
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}},
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{0x403, MSRTYPE_RDWR, MSR2(0,0), "IA32_MC0_MISC", "", {
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