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nb/intel/haswell: Report SMBIOS memory speed in MT/s 

The memory speed values in SMBIOS tables are expressed in MT/s, not MHz.
Adjust the reported frequency values accordingly.

Change-Id: If34827fee582ef10057e7540b9d23d8c74bd2a32
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61504
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons 2022-01-31 16:47:54 +01:00 committed by Felix Held
parent cd8771640f
commit 8b94d3e9d9
1 changed files with 2 additions and 2 deletions
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4
src/northbridge/intel/haswell/haswell_mrc/raminit.c
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@ -234,7 +234,7 @@ static void setup_sdram_meminfo(struct pei_data *pei_data)
memset(mem_info, 0, sizeof(struct memory_info));
const u32 ddr_frequency = (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100;
const u32 ddr_freq_mhz = (mchbar_read32(MC_BIOS_DATA) * 13333 * 2 + 50) / 100;
for (ch = 0; ch < NUM_CHANNELS; ch++) {
const u32 ch_conf = mchbar_read32(MAD_DIMM(ch));
@ -246,7 +246,7 @@ static void setup_sdram_meminfo(struct pei_data *pei_data)
dimm = &mem_info->dimm[dimm_cnt];
dimm->dimm_size = dimm_size;
dimm->ddr_type = MEMORY_TYPE_DDR3;
dimm->ddr_frequency = ddr_frequency;
dimm->ddr_frequency = ddr_freq_mhz * 2; /* In MT/s */
dimm->rank_per_dimm = 1 + ((ch_conf >> (17 + d_num)) & 1);
dimm->channel_num = ch;
dimm->dimm_num = d_num;