mb/google/nissa/variant/pujjo: Update devicetree settings
Based on schematic and gpio table of pujjo, generate overridetree.cb settings for pujjo. BUG=b:235182560 TEST=FW_NAME=pujjo emerge-nissa coreboot chromeos-bootimage Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com> Change-Id: I47b10d03798004d1f3e398070acb2cbad46900b7 Reviewed-on: https://review.coreboot.org/c/coreboot/+/65260 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Stanley Wu
Felix Held
parent
be03903ffb
commit
8b9bc48f4d
2 changed files with 349 additions and 2 deletions
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@ -249,6 +249,8 @@ config BOARD_GOOGLE_JOXER
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config BOARD_GOOGLE_PUJJO
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bool "-> Pujjo"
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select BOARD_GOOGLE_BASEBOARD_NISSA
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select DRIVERS_GENERIC_GPIO_KEYS
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select DRIVERS_GENESYSLOGIC_GL9750
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config BOARD_GOOGLE_XIVU
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bool "-> Xivu"
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@ -1,6 +1,351 @@
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chip soc/intel/alderlake
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register "sagv" = "SaGv_Enabled"
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device domain 0 on
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end
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# SOC Aux orientation override:
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# This is a bitfield that corresponds to up to 4 TCSS ports.
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# Bits (0,1) allocated for TCSS Port1 configuration and Bits (2,3)for TCSS Port2.
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# TcssAuxOri = 0101b
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# Bit0,Bit2 set to "1" indicates no retimer on USBC Ports
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# Bit1,Bit3 set to "0" indicates Aux lines are not swapped on the
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# motherboard to USBC connector
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register "tcss_aux_ori" = "5"
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register "typec_aux_bias_pads[0]" = "{.pad_auxp_dc = GPP_E22, .pad_auxn_dc = GPP_E23}"
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register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth port for CNVi WLAN
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# Configure external V1P05/Vnn/VnnSx Rails
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register "ext_fivr_settings" = "{
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.configure_ext_fivr = 1,
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.v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX,
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.vnn_enable_bitmap = FIVR_ENABLE_ALL_SX,
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.vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX,
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.v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL,
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.vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE,
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.v1p05_voltage_mv = 1050,
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.vnn_voltage_mv = 780,
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.vnn_sx_voltage_mv = 1050,
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.v1p05_icc_max_ma = 500,
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.vnn_icc_max_ma = 500,
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}"
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| I2C0 | TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| I2C1 | Touchscreen |
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#| I2C2 | Sub-board(PSensor)/WCAM |
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#| I2C3 | Audio |
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#| I2C5 | Trackpad |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.i2c[0] = {
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.early_init = 1,
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 160,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[1] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 157,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[2] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 157,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 158,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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.speed_config[0] = {
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.speed = I2C_SPEED_FAST,
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.scl_lcnt = 158,
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.scl_hcnt = 79,
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.sda_hold = 7,
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}
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},
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}"
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device domain 0 on
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device ref i2c1 on
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chip drivers/i2c/hid
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register "generic.hid" = ""ELAN9004""
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register "generic.desc" = ""ELAN Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
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register "generic.reset_delay_ms" = "20"
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register "generic.reset_off_delay_ms" = "2"
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register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C6)"
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register "generic.stop_delay_ms" = "280"
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register "generic.stop_off_delay_ms" = "2"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
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register "generic.enable_delay_ms" = "1"
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register "generic.has_power_resource" = "1"
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register "generic.disable_gpio_export_in_crs" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 10 on end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""GTCH7503""
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register "generic.desc" = ""G2TOUCH Touchscreen""
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_C7_IRQ)"
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register "generic.probed" = "1"
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register "generic.reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C1)"
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register "generic.reset_delay_ms" = "50"
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register "generic.enable_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C0)"
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register "generic.enable_delay_ms" = "1"
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register "generic.has_power_resource" = "1"
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register "generic.disable_gpio_export_in_crs" = "1"
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register "hid_desc_reg_offset" = "0x01"
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device i2c 40 on end
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end
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chip drivers/generic/gpio_keys
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register "name" = ""PENH""
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register "gpio" = "ACPI_GPIO_INPUT_ACTIVE_LOW(GPP_F13)"
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register "key.wake_gpe" = "GPE0_DW2_15"
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register "key.wakeup_route" = "WAKEUP_ROUTE_SCI"
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register "key.wakeup_event_action" = "EV_ACT_DEASSERTED"
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register "key.dev_name" = ""EJCT""
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register "key.linux_code" = "SW_PEN_INSERTED"
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register "key.linux_input_type" = "EV_SW"
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register "key.label" = ""pen_eject""
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device generic 0 on end
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end
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end
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device ref i2c2 on
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chip drivers/i2c/sx9324
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register "desc" = ""SAR Proximity Sensor""
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register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_H19_IRQ)"
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register "speed" = "I2C_SPEED_FAST"
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register "uid" = "1"
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register "reg_gnrl_ctrl0" = "0x16"
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register "reg_gnrl_ctrl1" = "0x21"
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register "reg_afe_ctrl0" = "0x00"
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register "reg_afe_ctrl1" = "0x10"
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register "reg_afe_ctrl2" = "0x00"
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register "reg_afe_ctrl3" = "0x00"
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register "reg_afe_ctrl4" = "0x07"
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register "reg_afe_ctrl5" = "0x00"
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register "reg_afe_ctrl6" = "0x00"
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register "reg_afe_ctrl7" = "0x07"
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register "reg_afe_ctrl8" = "0x12"
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register "reg_afe_ctrl9" = "0x0f"
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register "reg_prox_ctrl0" = "0x12"
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register "reg_prox_ctrl1" = "0x12"
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register "reg_prox_ctrl2" = "0x90"
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register "reg_prox_ctrl3" = "0x60"
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register "reg_prox_ctrl4" = "0x0c"
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register "reg_prox_ctrl5" = "0x12"
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register "reg_prox_ctrl6" = "0x3c"
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register "reg_prox_ctrl7" = "0x58"
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register "reg_adv_ctrl0" = "0x00"
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register "reg_adv_ctrl1" = "0x00"
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register "reg_adv_ctrl2" = "0x00"
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register "reg_adv_ctrl3" = "0x00"
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register "reg_adv_ctrl4" = "0x00"
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register "reg_adv_ctrl5" = "0x05"
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register "reg_adv_ctrl6" = "0x00"
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register "reg_adv_ctrl7" = "0x00"
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register "reg_adv_ctrl8" = "0x00"
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register "reg_adv_ctrl9" = "0x00"
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register "reg_adv_ctrl10" = "0x5c"
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register "reg_adv_ctrl11" = "0x52"
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register "reg_adv_ctrl12" = "0xb5"
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register "reg_adv_ctrl13" = "0x00"
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register "reg_adv_ctrl14" = "0x80"
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register "reg_adv_ctrl15" = "0x0c"
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register "reg_adv_ctrl16" = "0x38"
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register "reg_adv_ctrl17" = "0x56"
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register "reg_adv_ctrl18" = "0x33"
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register "reg_adv_ctrl19" = "0xf0"
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register "reg_adv_ctrl20" = "0xf0"
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device i2c 28 on end
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end
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end
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device ref i2c3 on
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chip drivers/i2c/generic
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register "hid" = ""RTL5682""
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register "name" = ""RT58""
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register "desc" = ""Headset Codec""
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
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# Set the jd_src to RT5668_JD1 for jack detection
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register "property_count" = "1"
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register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
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register "property_list[0].name" = ""realtek,jd-src""
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register "property_list[0].integer" = "1"
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device i2c 1a on end
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end
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chip drivers/generic/alc1015
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register "hid" = ""RTL1019""
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register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
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device generic 0 on end
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end
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end
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device ref i2c5 on
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chip drivers/i2c/generic
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register "hid" = ""ELAN0000""
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register "desc" = ""ELAN Touchpad""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
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register "wake" = "GPE0_DW2_14"
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register "probed" = "1"
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device i2c 15 on end
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end
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chip drivers/i2c/hid
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register "generic.hid" = ""PNP0C50""
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register "generic.desc" = ""Synaptics Touchpad""
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register "generic.irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F14_IRQ)"
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register "generic.wake" = "GPE0_DW2_14"
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register "generic.probed" = "1"
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register "hid_desc_reg_offset" = "0x20"
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device i2c 0x2c on end
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end
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end
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device ref hda on
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chip drivers/generic/max98357a
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register "hid" = ""MX98360A""
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register "sdmode_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
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register "sdmode_delay" = "5"
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device generic 0 on end
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end
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end
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device ref pcie_rp7 on
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# Enable SD Card PCIe 7 using clk 3
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register "pch_pcie_rp[PCH_RP(7)]" = "{
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.clk_src = 3,
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.clk_req = 3,
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.flags = PCIE_RP_HOTPLUG | PCIE_RP_LTR | PCIE_RP_AER,
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}"
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chip soc/intel/common/block/pcie/rtd3
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)"
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register "srcclk_pin" = "3"
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device generic 0 on end
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end
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end
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device ref pch_espi on
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chip ec/google/chromeec
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use conn0 as mux_conn[0]
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device pnp 0c09.0 on end
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end
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end
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device ref pmc hidden
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chip drivers/intel/pmc_mux
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device generic 0 on
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chip drivers/intel/pmc_mux/conn
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use usb2_port1 as usb2_port
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use tcss_usb3_port1 as usb3_port
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device generic 0 alias conn0 on end
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end
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end
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end
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end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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end
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end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 WWAN""
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register "type" = "UPC_TYPE_INTERNAL"
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device ref usb2_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A0 (MLB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A1 (DB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
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device ref usb2_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 UFC""
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register "type" = "UPC_TYPE_INTERNAL"
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 WFC""
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register "type" = "UPC_TYPE_INTERNAL"
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device ref usb2_port7 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
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device ref usb2_port10 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A0 (MLB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(LEFT, RIGHT, ACPI_PLD_GROUP(3, 1))"
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device ref usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A1 (DB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, LEFT, ACPI_PLD_GROUP(4, 1))"
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device ref usb3_port2 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 WWAN""
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register "type" = "UPC_TYPE_INTERNAL"
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device ref usb3_port3 on end
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end
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end
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end
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end
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end
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end
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