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drivers/intel/fsp2_0: Fix location of timestamp for loading FSP-S 

Currently, the "loading FSP-S" timestamp is added in fsp_silicon_init().
However, most Intel platforms actually load FSP-S earlier than this, in
soc_fsp_load(). So the timestamp is added in the wrong place.

Add the timestamp in fsps_load() instead, after the load_done early
return so that it will only be added for the first call.

Before:
949:finished CSE firmware sync                        961,833 (17,998)
 17:starting LZ4 decompress (ignore for x86)          1,018,328 (56,495)
 18:finished LZ4 decompress (ignore for x86)          1,018,797 (469)
 30:device enumeration                                1,035,096 (16,298)
971:loading FSP-S                                     1,048,082 (12,986)
954:calling FspSiliconInit                            1,049,331 (1,249)

After:
949:finished CSE firmware sync                        959,355 (16,370)
971:loading FSP-S                                     978,139 (18,784)
 17:starting LZ4 decompress (ignore for x86)          1,015,796 (37,656)
 18:finished LZ4 decompress (ignore for x86)          1,016,271 (475)
 30:device enumeration                                1,032,567 (16,295)
954:calling FspSiliconInit                            1,046,867 (14,300)

BUG=b:239769975
TEST="loading FSP-S" is added in the right place on nivviks (see above).

Change-Id: Ib26cf96ae97766333fe75ae44381d4f7c6cc7b61
Signed-off-by: Reka Norman <rekanorman@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67334
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Reka Norman 2022-09-05 15:33:39 +10:00 committed by Felix Held
parent 7329653512
commit 8baa3712c5
1 changed files with 2 additions and 1 deletions
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3
src/drivers/intel/fsp2_0/silicon_init.c
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@ -217,6 +217,8 @@ void fsps_load(void)
if (load_done)
return;
timestamp_add_now(TS_FSP_SILICON_INIT_LOAD);
if (resume_from_stage_cache()) {
printk(BIOS_DEBUG, "Loading FSPS from stage_cache\n");
stage_cache_load_stage(STAGE_REFCODE, fsps);
@ -245,7 +247,6 @@ void preload_fsps(void)
void fsp_silicon_init(void)
{
timestamp_add_now(TS_FSP_SILICON_INIT_LOAD);
fsps_load();
do_silicon_init(&fsps_hdr);