mb/intel/jasperlake_rvp: Re-organize the FMAP layout
More space is required in the COREBOOT CBFS to accommodate some features. Currently no alternate firmware is stuffed into RW_LEGACY CBFS and has ~1 MB of unused space. Borrow some space from RW_LEGACY CBFS and extend the RO_SECTION. Even within RO_SECTION, GBB requires only 12 KiB. So adjust the GBB region accordingly and extend the COREBOOT CBFS. BUG=b:162159386 TEST=Build the JSLRVP mainboard. Change-Id: Ia8bb381c31ddf76f3211f9d4ac5c8c18c27834b7 Signed-off-by: Karthikeyan Ramasubramanain <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44283 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-by: Justin TerAvest <teravest@chromium.org>
This commit is contained in:
parent
2a66dd2cc2
commit
8beb5ba230
|
@ -28,15 +28,15 @@ FLASH@0xff000000 0x1000000 {
|
||||||
RW_VPD(PRESERVE)@0x28000 0x2000
|
RW_VPD(PRESERVE)@0x28000 0x2000
|
||||||
RW_NVRAM(PRESERVE)@0x2a000 0x6000
|
RW_NVRAM(PRESERVE)@0x2a000 0x6000
|
||||||
}
|
}
|
||||||
RW_LEGACY(CBFS)@0x5d0000 0x100000
|
RW_LEGACY(CBFS)@0x5d0000 0x30000
|
||||||
WP_RO@0x6d0000 0x330000 {
|
WP_RO@0x600000 0x400000 {
|
||||||
RO_VPD(PRESERVE)@0x0 0x4000
|
RO_VPD(PRESERVE)@0x0 0x4000
|
||||||
RO_SECTION@0x4000 0x32c000 {
|
RO_SECTION@0x4000 0x3fc000 {
|
||||||
FMAP@0x0 0x800
|
FMAP@0x0 0x800
|
||||||
RO_FRID@0x800 0x40
|
RO_FRID@0x800 0x40
|
||||||
RO_FRID_PAD@0x840 0x7c0
|
RO_FRID_PAD@0x840 0x7c0
|
||||||
GBB@0x1000 0xef000
|
GBB@0x1000 0x3000
|
||||||
COREBOOT(CBFS)@0xf0000 0x23c000
|
COREBOOT(CBFS)@0x4000 0x3f8000
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue