util/ifdtool: Use -p platform name to detect IFDv2 platform and chipset

ifdtool uses `chipset` information to determine how certain straps
are decoded. This has been used for IFDv1 platforms as well as IFDv2
platforms (CHIPSET_500_600_SERIES_TIGER_ALDER_POINT).

IFDv2 platforms are all expected to pass in `-p` argument to identify
the platform. This platform information can be used to identify the
appropriate chipset information. For IFDv1 since `-p` argument is not
provided, ifdtool needs to use certain fields in the descriptor
(e.g. strap length) for unique identification of IFDv1 chipset.

This change updates `check_ifd_version()` function to:
1. Determine if IFD version is v1 or v2 based on `-p` argument.
If `-p` is not provided, it assumes that the platform is using IFDv1.
2. Based on IFD version, it calls either `ifd2_platform_to_chipset()`
or `ifd1_guess_chipset()` to determine chipset information.

This fixes the issue reported with CB:44815, where ifdtool is unable
to identify Alder Lake chipsets.

BUG=b:153888802
TEST=Able to dump FD contains correctly with platform quirks on Brya Platform.
> ifdtool -d coreboot.rom -p adl
PCH Revision: 500 series Tiger Point/ 600 series Alder Point

Change-Id: I25f69ce775454409974056d8326c02e29038ec8a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54305
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2021-06-10 23:02:29 +05:30
parent bd503978d4
commit 8c082e5fef
2 changed files with 43 additions and 71 deletions

View File

@ -69,9 +69,13 @@ static const char *const ich_chipset_names[] = {
"8 series Wellsburg",
"9 series Wildcat Point",
"9 series Wildcat Point LP",
"Apollo Lake: N3xxx, J3xxx",
"Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx",
"Jasper Lake: N6xxx, N51xx, N45xx",
"Elkhart Lake: x6000 series Atom",
"100/200 series Sunrise Point",
"300 series Cannon Point/ 400 series Ice Point",
"300 series Cannon Point",
"400 series Ice Point",
"500 series Tiger Point/ 600 series Alder Point",
"C620 series Lewisburg",
NULL
@ -165,40 +169,16 @@ static fmsba_t *find_fmsba(char *image, int size)
return PTR_IN_RANGE(fmsba, image, size) ? fmsba : NULL;
}
static enum ich_chipset guess_ifd_2_chipset(const fpsba_t *fpsba)
{
uint32_t pchstrp_22 = fpsba->pchstrp[22];
uint32_t pchstrp_23 = fpsba->pchstrp[23];
/* Offset 0x5B is the last PCH descriptor record */
if (pchstrp_23 == 0xFFFFFFFF)
return CHIPSET_N_J_SERIES;
/* Offset 0x58 is PCH descriptor record is reserved */
if (pchstrp_22 == 0x0)
return CHIPSET_300_400_SERIES_CANNON_ICE_POINT;
/* Offset 0x58 bit [2:0] is reserved 0x4 and 0x5a bit [7:0] is reserved 0x58 */
if (((pchstrp_22 & 0x07) == 0x4) &&
((pchstrp_22 & 0xFF0000) >> 16 == 0x58))
return CHIPSET_500_600_SERIES_TIGER_ALDER_POINT;
return CHIPSET_PCH_UNKNOWN;
}
/* port from flashrom */
static enum ich_chipset guess_ich_chipset(const fdbar_t *fdb, const fpsba_t *fpsba)
static enum ich_chipset ifd1_guess_chipset(char *image, int size)
{
const fdbar_t *fdb = find_fd(image, size);
if (!fdb)
exit(EXIT_FAILURE);
uint32_t iccriba = (fdb->flmap2 >> 16) & 0xff;
uint32_t msl = (fdb->flmap2 >> 8) & 0xff;
uint32_t isl = (fdb->flmap1 >> 24);
uint32_t nm = (fdb->flmap1 >> 8) & 0x7;
int temp_chipset;
/* Check for IFD2 chipset type */
temp_chipset = guess_ifd_2_chipset(fpsba);
if (temp_chipset != CHIPSET_PCH_UNKNOWN)
return temp_chipset;
/* Rest for IFD1 chipset type */
if (iccriba == 0x00) {
@ -228,6 +208,27 @@ static enum ich_chipset guess_ich_chipset(const fdbar_t *fdb, const fpsba_t *fps
}
}
static enum ich_chipset ifd2_platform_to_chipset(const int pindex)
{
switch (pindex) {
case PLATFORM_GLK:
return CHIPSET_N_J_SERIES_GEMINI_LAKE;
case PLATFORM_JSL:
return CHIPSET_N_SERIES_JASPER_LAKE;
case PLATFORM_EHL:
return CHIPSET_x6000_SERIES_ELKHART_LAKE;
case PLATFORM_CNL:
return CHIPSET_300_SERIES_CANNON_POINT;
case PLATFORM_TGL:
case PLATFORM_ADL:
return CHIPSET_500_600_SERIES_TIGER_ALDER_POINT;
case PLATFORM_ICL:
return CHIPSET_400_SERIES_ICE_POINT;
default:
return CHIPSET_PCH_UNKNOWN;
}
}
/*
* Some newer platforms have re-defined the FCBA field that was used to
* distinguish IFD v1 v/s v2. Define a list of platforms that we know do not
@ -255,50 +256,17 @@ static int is_platform_ifd_2(void)
return 0;
}
/*
* There is no version field in the descriptor so to determine
* if this is a new descriptor format we check the hardcoded SPI
* read frequency to see if it is fixed at 20MHz or 17MHz.
*/
static int get_ifd_version_from_fcba(char *image, int size)
{
int read_freq;
const fcba_t *fcba = find_fcba(image, size);
const fdbar_t *fdb = find_fd(image, size);
const fpsba_t *fpsba = find_fpsba(image, size);
if (!fcba || !fdb || !fpsba)
exit(EXIT_FAILURE);
chipset = guess_ich_chipset(fdb, fpsba);
/* TODO: port ifd_version and max_regions
* against guess_ich_chipset()
*/
read_freq = (fcba->flcomp >> 17) & 7;
switch (read_freq) {
case SPI_FREQUENCY_20MHZ:
return IFD_VERSION_1;
case SPI_FREQUENCY_17MHZ:
case SPI_FREQUENCY_50MHZ_30MHZ:
return IFD_VERSION_2;
default:
fprintf(stderr, "Unknown descriptor version: %d\n",
read_freq);
exit(EXIT_FAILURE);
}
}
static void check_ifd_version(char *image, int size)
{
if (is_platform_ifd_2())
if (is_platform_ifd_2()) {
ifd_version = IFD_VERSION_2;
else
ifd_version = get_ifd_version_from_fcba(image, size);
if (ifd_version == IFD_VERSION_1)
max_regions = MAX_REGIONS_OLD;
else
chipset = ifd2_platform_to_chipset(platform);
max_regions = MAX_REGIONS;
} else {
ifd_version = IFD_VERSION_1;
chipset = ifd1_guess_chipset(image, size);
max_regions = MAX_REGIONS_OLD;
}
}
static region_t get_region(const frba_t *frba, unsigned int region_type)

View File

@ -35,9 +35,13 @@ enum ich_chipset {
CHIPSET_8_SERIES_WELLSBURG,
CHIPSET_9_SERIES_WILDCAT_POINT,
CHIPSET_9_SERIES_WILDCAT_POINT_LP,
CHIPSET_N_J_SERIES, /* Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx */
CHIPSET_N_J_SERIES_APOLLO_LAKE, /* Apollo Lake: N3xxx, J3xxx */
CHIPSET_N_J_SERIES_GEMINI_LAKE, /* Gemini Lake: N5xxx, J5xxx, N4xxx, J4xxx */
CHIPSET_N_SERIES_JASPER_LAKE, /* Jasper Lake: N6xxx, N51xx, N45xx */
CHIPSET_x6000_SERIES_ELKHART_LAKE, /* Elkhart Lake: x6000 */
CHIPSET_100_200_SERIES_SUNRISE_POINT, /* 6th-7th gen Core i/o (LP) variants */
CHIPSET_300_400_SERIES_CANNON_ICE_POINT, /* 8th-10th gen Core i/o (LP) variants */
CHIPSET_300_SERIES_CANNON_POINT, /* 8th-9th gen Core i/o (LP) variants */
CHIPSET_400_SERIES_ICE_POINT, /* 10th gen Core i/o (LP) variants */
CHIPSET_500_600_SERIES_TIGER_ALDER_POINT, /* 11th-12th gen Core i/o (LP)
* variants onwards */
CHIPSET_C620_SERIES_LEWISBURG,