Move DIMM_MAP_LOGICAL to Kconfig.

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/mainboard/dell/s1850/Kconfig

@@ -46,4 +46,8 @@ config IRQ_SLOT_COUNT
 	int
 	default 9
 
+config DIMM_MAP_LOGICAL
+	hex
+	default 0x2841
+
 endif # BOARD_DELL_S1850

src/mainboard/dell/s1850/romstage.c

@@ -37,9 +37,6 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 	return smbus_read_byte(device, address);
 }
 
-/* this is very highly mainboard dependent, related to wiring */
-/* from factory BIOS via lspci */
-#define DIMM_MAP_LOGICAL 0x2841
 #include "northbridge/intel/e7520/raminit.c"
 #include "lib/generic_sdram.c"
 

src/mainboard/intel/jarrell/Kconfig

@@ -43,4 +43,8 @@ config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
 	hex
 	default 0x1079
 
+config DIMM_MAP_LOGICAL
+	hex
+	default 0x0124
+
 endif # BOARD_INTEL_JARRELL

src/mainboard/intel/jarrell/romstage.c

@@ -29,8 +29,6 @@
 #define DEVPRES_CONFIG  (DEVPRES_D1F0 | DEVPRES_D2F0 | DEVPRES_D6F0)
 #define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
 
-#define DIMM_MAP_LOGICAL 0x0124
-
 static inline int spd_read_byte(unsigned device, unsigned address)
 {
 	return smbus_read_byte(device, address);

src/northbridge/intel/e7520/Kconfig

@@ -1,3 +1,9 @@
 config NORTHBRIDGE_INTEL_E7520
 	bool
 
+if NORTHBRIDGE_INTEL_E7520
+config DIMM_MAP_LOGICAL
+	hex
+	default 0x1248
+
+endif

src/northbridge/intel/e7520/raminit.c

@@ -1078,12 +1078,8 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	print_debug("Starting SDRAM Enable\n");
 
 	/* 0x80 */
-#ifdef DIMM_MAP_LOGICAL
 	pci_write_config32(PCI_DEV(0, 0x00, 0), DRM,
-		0x00210000 | DIMM_MAP_LOGICAL);
+		0x00210000 | CONFIG_DIMM_MAP_LOGICAL);
-#else
-	pci_write_config32(PCI_DEV(0, 0x00, 0), DRM, 0x00211248);
-#endif
 	/* set dram type and Front Side Bus freq. */
 	drc = spd_set_dram_controller_mode(ctrl, mask);
 	if( drc == 0) {

src/northbridge/intel/e7525/Kconfig

@@ -1,3 +1,9 @@
 config NORTHBRIDGE_INTEL_E7525
 	bool
 
+if NORTHBRIDGE_INTEL_E7525
+config DIMM_MAP_LOGICAL
+	hex
+	default 0x1248
+
+endif

src/northbridge/intel/e7525/raminit.c

@@ -1055,12 +1055,8 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	print_debug("Starting SDRAM Enable\n");
 
 	/* 0x80 */
-#ifdef DIMM_MAP_LOGICAL
 	pci_write_config32(ctrl->f0, DRM,
-		0x00210000 | DIMM_MAP_LOGICAL);
+		0x00210000 | CONFIG_DIMM_MAP_LOGICAL);
-#else
-	pci_write_config32(ctrl->f0, DRM, 0x00211248);
-#endif
 	/* set dram type and Front Side Bus freq. */
 	drc = spd_set_dram_controller_mode(ctrl, mask);
 	if( drc == 0) {

src/northbridge/intel/i3100/Kconfig

@@ -1,3 +1,9 @@
 config NORTHBRIDGE_INTEL_I3100
 	bool
 
+if NORTHBRIDGE_INTEL_I3100
+config DIMM_MAP_LOGICAL
+	hex
+	default 0x1248
+
+endif

src/northbridge/intel/i3100/raminit.c

@@ -973,12 +973,8 @@ static void sdram_enable(int controllers, const struct mem_controller *ctrl)
 	print_debug("Starting SDRAM Enable\n");
 
 	/* 0x80 */
-#ifdef DIMM_MAP_LOGICAL
 	pci_write_config32(ctrl->f0, DRM,
-		0x00410000 | DIMM_MAP_LOGICAL);
+		0x00410000 | CONFIG_DIMM_MAP_LOGICAL);
-#else
-	pci_write_config32(ctrl->f0, DRM, 0x00411248);
-#endif
 	/* set dram type and Front Side Bus freq. */
 	drc = spd_set_dram_controller_mode(ctrl, mask);
 	if( drc == 0) {