GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd/common,picasso: Place some ENV_X86 guards 

Base address symbols for ACPIMMIO banks that would not get
assigned at runtime must not resolve at linker-stage either.

The build of PSP-verstage should pass without the preprocessor
macros that have x86-centric view of memory space.

Change-Id: I3cb1b5a90023ebc4359835be716c5e3f9451df60
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42523
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2020-06-22 18:16:39 +03:00 committed by Felix Held
parent 79d0ea4b7e
commit 8c1e603800
2 changed files with 20 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
src/soc/amd/common/block/acpimmio/mmio_util.c
View File

@ -2,16 +2,25 @@
#include <types.h>
#include <arch/io.h>
#include <amdblocks/acpimmio_map.h>
#include <amdblocks/acpimmio.h>
#if CONSTANT_ACPIMMIO_BASE_ADDRESS
#if ENV_X86
#include <amdblocks/acpimmio_map.h>
#endif
#if ENV_X86 && CONSTANT_ACPIMMIO_BASE_ADDRESS
#define DECLARE_ACPIMMIO(ptr, bank) \
uint8_t *const ptr = (void *)(uintptr_t)ACPIMMIO_BASE(bank)
#else
#define DECLARE_ACPIMMIO(ptr, bank) uint8_t *ptr
#endif
DECLARE_ACPIMMIO(acpimmio_aoac, AOAC);
DECLARE_ACPIMMIO(acpimmio_iomux, IOMUX);
DECLARE_ACPIMMIO(acpimmio_gpio0, GPIO0);
DECLARE_ACPIMMIO(acpimmio_misc, MISC);
#if ENV_X86
DECLARE_ACPIMMIO(acpimmio_sm_pci, SM_PCI);
DECLARE_ACPIMMIO(acpimmio_gpio_100, GPIO_100);
DECLARE_ACPIMMIO(acpimmio_smi, SMI);
@ -25,15 +34,12 @@ DECLARE_ACPIMMIO(acpimmio_asf, ASF);
DECLARE_ACPIMMIO(acpimmio_smbus, SMBUS);
DECLARE_ACPIMMIO(acpimmio_wdt, WDT);
DECLARE_ACPIMMIO(acpimmio_hpet, HPET);
DECLARE_ACPIMMIO(acpimmio_iomux, IOMUX);
DECLARE_ACPIMMIO(acpimmio_misc, MISC);
DECLARE_ACPIMMIO(acpimmio_dpvga, DPVGA);
DECLARE_ACPIMMIO(acpimmio_gpio0, GPIO0);
DECLARE_ACPIMMIO(acpimmio_gpio1, GPIO1);
DECLARE_ACPIMMIO(acpimmio_gpio2, GPIO2);
DECLARE_ACPIMMIO(acpimmio_xhci_pm, XHCIPM);
DECLARE_ACPIMMIO(acpimmio_acdc_tmr, ACDCTMR);
DECLARE_ACPIMMIO(acpimmio_aoac, AOAC);
#endif
#undef DECLARE_ACPIMMIO

8
src/soc/amd/picasso/include/soc/iomap.h
View File

@ -3,6 +3,8 @@
#ifndef AMD_PICASSO_IOMAP_H
#define AMD_PICASSO_IOMAP_H
#if ENV_X86
/* MMIO Ranges */
/* IO_APIC_ADDR defined in arch/x86 0xfec00000 */
#define GNB_IO_APIC_ADDR 0xfec01000
@ -22,6 +24,8 @@
/* Reserved 0xfecd1000-0xfedc3fff */
#endif /* ENV_X86 */
/*
* Picasso/Dali have I2C0 and I2C1 wired to the Sensor Fusion Hub (SFH/MP2).
* The controllers are not directly accessible via the x86.
@ -37,6 +41,8 @@
#define I2C_MASTER_START_INDEX 2
#define I2C_SLAVE_DEV_COUNT 1
#if ENV_X86
#define APU_I2C2_BASE 0xfedc4000
#define APU_I2C3_BASE 0xfedc5000
#define APU_I2C4_BASE 0xfedc6000
@ -62,6 +68,8 @@
#define FLASH_BASE_ADDR ((0xffffffff - CONFIG_ROM_SIZE) + 1)
#endif /* ENV_X86 */
/* I/O Ranges */
#define ACPI_SMI_CTL_PORT 0xb2
#define PICASSO_ACPI_IO_BASE CONFIG_PICASSO_ACPI_IO_BASE