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haswell: wait 10ms after INIT IPI 

There should be a fixed 10ms wait after sending an INIT IPI. The
previous implementation was just waiting up to 10ms for the IPI to
complete the send. That is not correct. The 10ms is unconditional
according to the documentation. No ill effects were observed with the
previous behavior, but it's important to follow the documentation.

Change-Id: Ib31d49ac74808f6eb512310e9f54a8f4abc3bfd7
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2780
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Aaron Durbin 2013-01-17 11:13:46 -06:00 committed by Ronald G. Minnich
parent 305b1f0d30
commit 8c20399a42
1 changed files with 2 additions and 9 deletions
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11
src/cpu/intel/haswell/mp_init.c
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@ -458,15 +458,8 @@ int start_aps(struct bus *cpu_bus, int ap_count)
lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(0)); lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(0));
lapic_write_around(LAPIC_ICR, LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT | lapic_write_around(LAPIC_ICR, LAPIC_DEST_ALLBUT | LAPIC_INT_ASSERT |
LAPIC_DM_INIT); LAPIC_DM_INIT);
printk(BIOS_DEBUG, "Waiting for INIT to complete..."); printk(BIOS_DEBUG, "Waiting for 10ms after sending INIT.\n");
mdelay(10);
/* Wait for 10 ms to complete. */
if (apic_wait_timeout(10000 /* 10 ms */, 100 /* us */)) {
printk(BIOS_DEBUG, "timed out. Bailing. \n");
return -1;
} else {
printk(BIOS_DEBUG, "done.\n");
}
/* Send 1st SIPI */ /* Send 1st SIPI */
if ((lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) { if ((lapic_read(LAPIC_ICR) & LAPIC_ICR_BUSY)) {