soc/intel/alderlake: Set `pch_thermal_trip` for Dynamic Thermal Shutdown

Set low maximum temp threshold value used for dynamic thermal sensor
shutdown consideration.

BUG=b:193774296

Change-Id: I7ee199c19a9d926a4135eeef3b3b481fbff74a79
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
This commit is contained in:
Subrata Banik 2021-11-17 13:34:15 +05:30
parent 2ee30add35
commit 8c45f236bc
1 changed files with 5 additions and 0 deletions

View File

@ -48,6 +48,11 @@ chip soc/intel/alderlake
.tdp_pl4 = 123, .tdp_pl4 = 123,
}" }"
# NOTE: if any variant wants to override this value, use the same format
# as register "common_soc_config.pch_thermal_trip" = "value", instead of
# putting it under register "common_soc_config" in overridetree.cb file.
register "common_soc_config.pch_thermal_trip" = "100"
device domain 0 on device domain 0 on
device gpio 0 alias pch_gpio on end device gpio 0 alias pch_gpio on end
device pci 00.0 alias system_agent on end device pci 00.0 alias system_agent on end