soc/amd/common/block/lpc/lpc_util: drop lpc_enable_pci_port80
This function is unused and none of the SoCs using this code has a physical PCI interface any more, so drop this function. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia5c5a8ec29264a075fefe75038ef2a84684d6427 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59675 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
This commit is contained in:
parent
4b5a490b6f
commit
8c4fe3f0f6
|
@ -142,7 +142,6 @@
|
|||
* with the enable bits. */
|
||||
void lpc_disable_decodes(void);
|
||||
void lpc_enable_port80(void);
|
||||
void lpc_enable_pci_port80(void);
|
||||
void lpc_enable_decode(uint32_t decodes);
|
||||
/* addr = index/data to enable: LPC_SELECT_SIO_2E2F or LPC_SELECT_SIO_4E4F */
|
||||
void lpc_enable_sio_decode(const bool addr);
|
||||
|
|
|
@ -145,15 +145,6 @@ void lpc_enable_port80(void)
|
|||
pci_write_config8(_LPCB_DEV, LPC_IO_OR_MEM_DEC_EN_HIGH, byte);
|
||||
}
|
||||
|
||||
void lpc_enable_pci_port80(void)
|
||||
{
|
||||
u8 byte;
|
||||
|
||||
byte = pci_read_config8(_LPCB_DEV, LPC_IO_OR_MEM_DEC_EN_HIGH);
|
||||
byte &= ~DECODE_IO_PORT_ENABLE4_H; /* disable lpc port 80 */
|
||||
pci_write_config8(_LPCB_DEV, LPC_IO_OR_MEM_DEC_EN_HIGH, byte);
|
||||
}
|
||||
|
||||
void lpc_enable_sio_decode(const bool addr)
|
||||
{
|
||||
uint32_t decodes;
|
||||
|
|
Loading…
Reference in New Issue