mb/google/rex: Temporarily disable the crashlog

Currently, boards with ES2 silicon are unable to boot with crashlog
enabled because crashlog driver is unable to handle invalid data.

Temporarily disable the crashlog to unblock development until the issue
is fixed.

BUG=b:289749310
TEST=Able to boot to the OS on Screebo

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: Ic63cf9cf5bfa2c92d8f2c5b13df2f23dc118b389
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76231
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Jakub Czapiga <jacz@semihalf.com>
This commit is contained in:
Kapil Porwal 2023-07-04 03:11:15 +00:00 committed by Subrata Banik
parent 28d18ade43
commit 8c551cbe72
1 changed files with 0 additions and 2 deletions

View File

@ -38,7 +38,6 @@ config BOARD_GOOGLE_BASEBOARD_REX
select HAVE_SLP_S0_GATE
select MAINBOARD_HAS_CHROMEOS
select MEMORY_SOLDERDOWN
select SOC_INTEL_CRASHLOG
select SOC_INTEL_IOE_DIE_SUPPORT
select SOC_INTEL_METEORLAKE_U_H
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES
@ -53,7 +52,6 @@ config BOARD_GOOGLE_BASEBOARD_OVIS
select HAVE_SLP_S0_GATE
select MAINBOARD_HAS_CHROMEOS
select MEMORY_SOLDERDOWN
select SOC_INTEL_CRASHLOG
select SOC_INTEL_IOE_DIE_SUPPORT
select SOC_INTEL_METEORLAKE_U_H
select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES