From 8c639359ea6dcb0eb445a37c1c276652b34ff437 Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 22 Jun 2015 19:32:53 +0200 Subject: [PATCH] ddr3: Fix SPD CRC calculation Use the correct SPD size for crc calculation. sizeof(*spd) returns 4 while sizeof(spd_raw_data) returns the expected value of 256. Fixes erroneous printing of "ERROR: SPD CRC failed!!!" in raminit log. Verified by testing this code on Intel IvyBridge and Gigabyte GA-B75M-D3H. Change-Id: Iba305c69debd64fa921e08e00ec0a3531c80f56f Signed-off-by: Patrick Rudolph Reviewed-on: http://review.coreboot.org/10629 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke Reviewed-by: Patrick Georgi Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/device/dram/ddr3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/device/dram/ddr3.c b/src/device/dram/ddr3.c index 8170ae17da..c10741bdb3 100644 --- a/src/device/dram/ddr3.c +++ b/src/device/dram/ddr3.c @@ -128,7 +128,7 @@ int spd_decode_ddr3(dimm_attr * dimm, spd_raw_data spd) dimm->dram_type = SPD_MEMORY_TYPE_SDRAM_DDR3; dimm->dimm_type = spd[3] & 0xf; - crc = spd_ddr3_calc_crc(spd, sizeof(*spd)); + crc = spd_ddr3_calc_crc(spd, sizeof(spd_raw_data)); /* Compare with the CRC in the SPD */ spd_crc = (spd[127] << 8) + spd[126]; /* Verify the CRC is correct */