cpu/intel/microcode_asm.S: Fix reading cpuid(1) and checking PF
The value of %ebx was clobbered later on by a cpuid call. A bitwise and needs to be used to check processor flags. Change-Id: I29f1fddfe3cc2cbfc7c843b6aff7425f32e12317 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/30680 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -88,11 +88,6 @@ update_bsp_microcode:
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* Current installed microcode revision -> %edx
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* Current installed microcode revision -> %edx
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*/
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*/
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/* Processor family+model signature=cpuid_eax(1) */
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movl $1, %eax
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cpuid
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movl %eax, %ebx
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/* Processor flags
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/* Processor flags
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* rdmsr 0x17
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* rdmsr 0x17
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* pf = 1 << ((msr.hi >> 18) & 7) */
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* pf = 1 << ((msr.hi >> 18) & 7) */
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@ -113,6 +108,10 @@ update_bsp_microcode:
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wrmsr
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wrmsr
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movl $0x1, %eax
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movl $0x1, %eax
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cpuid
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cpuid
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/* Processor family+model signature=cpuid_eax(1) */
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movl %eax, %ebx
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movl $IA32_BIOS_SIGN_ID, %ecx
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movl $IA32_BIOS_SIGN_ID, %ecx
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rdmsr
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rdmsr
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@ -126,8 +125,8 @@ check_microcode_entry:
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jne next_entry
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jne next_entry
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/* Processor flags */
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/* Processor flags */
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cmpl PROCESSOR_FLAG(%esi), %ebp
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test PROCESSOR_FLAG(%esi), %ebp
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jne next_entry
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jz next_entry
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/* Check if revision is higher than current */
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/* Check if revision is higher than current */
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cmpl UPDATE_VER_OFFSET(%esi), %edx
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cmpl UPDATE_VER_OFFSET(%esi), %edx
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