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cpu/intel/microcode_asm.S: Fix reading cpuid(1) and checking PF 

The value of %ebx was clobbered later on by a cpuid call.

A bitwise and needs to be used to check processor flags.

Change-Id: I29f1fddfe3cc2cbfc7c843b6aff7425f32e12317
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/30680
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2019-01-05 17:20:11 +01:00 committed by Kyösti Mälkki
parent eaea9c987c
commit 8c70dd66da
1 changed files with 6 additions and 7 deletions
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13
src/cpu/intel/microcode/microcode_asm.S
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@ -88,11 +88,6 @@ update_bsp_microcode:
* Current installed microcode revision -> %edx
*/
/* Processor family+model signature=cpuid_eax(1) */
movl $1, %eax
cpuid
movl %eax, %ebx
/* Processor flags
* rdmsr 0x17
* pf = 1 << ((msr.hi >> 18) & 7) */
@ -113,6 +108,10 @@ update_bsp_microcode:
wrmsr
movl $0x1, %eax
cpuid
/* Processor family+model signature=cpuid_eax(1) */
movl %eax, %ebx
movl $IA32_BIOS_SIGN_ID, %ecx
rdmsr
@ -126,8 +125,8 @@ check_microcode_entry:
jne next_entry
/* Processor flags */
cmpl PROCESSOR_FLAG(%esi), %ebp
jne next_entry
test PROCESSOR_FLAG(%esi), %ebp
jz next_entry
/* Check if revision is higher than current */
cmpl UPDATE_VER_OFFSET(%esi), %edx