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soc/intel/apollolake: Switch to snake case for ModPhyVoltageBump 

For a unification of the naming convension, change from pascal case to
snake case style for parameter 'ModPhyVoltageBump'.

Change-Id: Ic1e743e23bdfc45588411c584eecb839cc552faf
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75856
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Mario Scheithauer 2023-06-15 14:32:46 +02:00 committed by Jakub Czapiga
parent 16d1eb68d2
commit 8c822189bd
2 changed files with 2 additions and 2 deletions
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2
src/soc/intel/apollolake/chip.c
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@ -617,7 +617,7 @@ static void glk_fsp_silicon_init_params_cb(
/* /*
* Options to bump USB3 LDO voltage with 40mv. * Options to bump USB3 LDO voltage with 40mv.
*/ */
silconfig->ModPhyVoltageBump = cfg->ModPhyVoltageBump; silconfig->ModPhyVoltageBump = cfg->mod_phy_voltage_bump;
/* /*
* Options to adjust PMIC Vdd2 voltage. * Options to adjust PMIC Vdd2 voltage.

2
src/soc/intel/apollolake/chip.h
View File

@ -196,7 +196,7 @@ struct soc_intel_apollolake_config {
* LDO voltage. Set TRUE to increase LDO voltage with 40mV. * LDO voltage. Set TRUE to increase LDO voltage with 40mV.
* 0:FALSE (default), 1:True. * 0:FALSE (default), 1:True.
*/ */
uint8_t ModPhyVoltageBump; uint8_t mod_phy_voltage_bump;
/* Options to adjust PMIC Vdd2 voltage. Default is 0 to not adjusting /* Options to adjust PMIC Vdd2 voltage. Default is 0 to not adjusting
* the PMIC Vdd2 default voltage 1.20v. Upd for changing Vdd2 Voltage * the PMIC Vdd2 default voltage 1.20v. Upd for changing Vdd2 Voltage