mediatek/mt8173: Add GPIO driver
BUG=none TEST=emerge-oak coreboot BRANCH=none Change-Id: I54755d81144b27cc9a674434609b2d99f1d486ec Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: d88a3ed43ad32e245e54a9599fb8667ce288217b Original-Change-Id: I1142091650c0de2207c7635031aa7edfe487ad88 Original-Signed-off-by: Biao Huang <biao.huang@mediatek.com> Original-Reviewed-on: https://chromium-review.googlesource.com/292672 Original-Commit-Ready: Yidi Lin <yidi.lin@mediatek.com> Original-Tested-by: Yidi Lin <yidi.lin@mediatek.com> Original-Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/12603 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -12,6 +12,7 @@ config SOC_MEDIATEK_MT8173
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select HAVE_MONOTONIC_TIMER
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select GENERIC_UDELAY
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select HAS_PRECBMEM_TIMESTAMP_REGION
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select GENERIC_GPIO_LIB
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if SOC_MEDIATEK_MT8173
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@ -28,7 +28,7 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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bootblock-y += pmic_wrap.c
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bootblock-y += gpio.c pmic_wrap.c
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################################################################################
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@ -37,6 +37,7 @@ romstage-y += timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += cbmem.c
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romstage-y += gpio.c
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################################################################################
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@ -45,6 +46,7 @@ ramstage-y += cbfs.c
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ramstage-y += soc.c
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ramstage-y += timer.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += gpio.c
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################################################################################
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@ -0,0 +1,181 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <assert.h>
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#include <console/console.h>
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#include <gpio.h>
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#include <types.h>
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#include <soc/addressmap.h>
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#include <soc/gpio.h>
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enum {
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MAX_8173_GPIO = 134,
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MAX_GPIO_REG_BITS = 16,
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MAX_GPIO_MODE_PER_REG = 5,
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GPIO_MODE_BITS = 3,
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};
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enum {
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GPIO_DIRECTION_IN = 0,
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GPIO_DIRECTION_OUT = 1,
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};
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enum {
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GPIO_MODE = 0,
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};
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static void pos_bit_calc(u32 pin, u32 *pos, u32 *bit)
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{
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*pos = pin / MAX_GPIO_REG_BITS;
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*bit = pin % MAX_GPIO_REG_BITS;
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}
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static void pos_bit_calc_for_mode(u32 pin, u32 *pos, u32 *bit)
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{
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*pos = pin / MAX_GPIO_MODE_PER_REG;
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*bit = (pin % MAX_GPIO_MODE_PER_REG) * GPIO_MODE_BITS;
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}
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static s32 gpio_set_dir(u32 pin, u32 dir)
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{
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u32 pos;
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u32 bit;
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u16 *reg;
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assert(pin <= MAX_8173_GPIO);
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pos_bit_calc(pin, &pos, &bit);
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if (dir == GPIO_DIRECTION_IN)
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reg = &mt8173_gpio->dir[pos].rst;
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else
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reg = &mt8173_gpio->dir[pos].set;
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write16(reg, 1L << bit);
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return 0;
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}
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void gpio_set_pull(gpio_t pin, enum pull_enable enable,
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enum pull_select select)
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{
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u32 pos;
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u32 bit;
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u16 *en_reg, *sel_reg;
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assert(pin <= MAX_8173_GPIO);
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pos_bit_calc(pin, &pos, &bit);
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if (enable == GPIO_PULL_DISABLE) {
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en_reg = &mt8173_gpio->pullen[pos].rst;
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} else {
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/* These pins' pulls can't be set through GPIO controller. */
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assert(pin < 22 || pin > 27);
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assert(pin < 47 || pin > 56);
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assert(pin < 57 || pin > 68);
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assert(pin < 73 || pin > 78);
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assert(pin < 100 || pin > 105);
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assert(pin < 119 || pin > 124);
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en_reg = &mt8173_gpio->pullen[pos].set;
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sel_reg = (select == GPIO_PULL_DOWN) ?
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(&mt8173_gpio->pullsel[pos].rst) :
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(&mt8173_gpio->pullsel[pos].set);
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write16(sel_reg, 1L << bit);
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}
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write16(en_reg, 1L << bit);
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}
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int gpio_get(gpio_t pin)
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{
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u32 pos;
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u32 bit;
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u16 *reg;
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s32 data;
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assert(pin <= MAX_8173_GPIO);
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pos_bit_calc(pin, &pos, &bit);
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reg = &mt8173_gpio->din[pos].val;
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data = read32(reg);
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return (data & (1L << bit)) ? 1 : 0;
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}
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void gpio_set(gpio_t pin, int output)
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{
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u32 pos;
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u32 bit;
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u16 *reg;
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assert(pin <= MAX_8173_GPIO);
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pos_bit_calc(pin, &pos, &bit);
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if (output == 0)
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reg = &mt8173_gpio->dout[pos].rst;
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else
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reg = &mt8173_gpio->dout[pos].set;
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write16(reg, 1L << bit);
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}
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void gpio_set_mode(gpio_t pin, int mode)
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{
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u32 pos;
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u32 bit;
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u32 mask = (1L << GPIO_MODE_BITS) - 1;
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assert(pin <= MAX_8173_GPIO);
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pos_bit_calc_for_mode(pin, &pos, &bit);
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clrsetbits_le32(&mt8173_gpio->mode[pos].val,
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mask << bit, mode << bit);
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}
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void gpio_input_pulldown(gpio_t gpio)
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{
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gpio_set_pull(gpio, GPIO_PULL_ENABLE, GPIO_PULL_DOWN);
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gpio_set_dir(gpio, GPIO_DIRECTION_IN);
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gpio_set_mode(gpio, GPIO_MODE);
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}
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void gpio_input_pullup(gpio_t gpio)
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{
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gpio_set_pull(gpio, GPIO_PULL_ENABLE, GPIO_PULL_UP);
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gpio_set_dir(gpio, GPIO_DIRECTION_IN);
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gpio_set_mode(gpio, GPIO_MODE);
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}
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void gpio_input(gpio_t gpio)
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{
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gpio_set_pull(gpio, GPIO_PULL_DISABLE, GPIO_PULL_DOWN);
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gpio_set_dir(gpio, GPIO_DIRECTION_IN);
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gpio_set_mode(gpio, GPIO_MODE);
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}
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void gpio_output(gpio_t gpio, int value)
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{
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gpio_set_pull(gpio, GPIO_PULL_DISABLE, GPIO_PULL_DOWN);
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gpio_set(gpio, value);
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gpio_set_dir(gpio, GPIO_DIRECTION_OUT);
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gpio_set_mode(gpio, GPIO_MODE);
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}
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@ -0,0 +1,92 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2015 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef SOC_MEDIATEK_MT8173_GPIO_H
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#define SOC_MEDIATEK_MT8173_GPIO_H
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#include <stdint.h>
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#include <stdlib.h>
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#include <soc/addressmap.h>
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enum pull_enable {
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GPIO_PULL_DISABLE = 0,
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GPIO_PULL_ENABLE = 1,
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};
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enum pull_select {
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GPIO_PULL_DOWN = 0,
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GPIO_PULL_UP = 1,
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};
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enum external_power {
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GPIO_EINT_3P3V = 0,
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GPIO_EINT_1P8V = 1,
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};
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typedef u32 gpio_t;
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struct val_regs {
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uint16_t val;
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uint16_t align1;
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uint16_t set;
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uint16_t align2;
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uint16_t rst;
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uint16_t align3[3];
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};
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struct gpio_regs {
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struct val_regs dir[9];
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uint8_t rsv00[112];
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struct val_regs pullen[9];
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uint8_t rsv01[112];
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struct val_regs pullsel[9];
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uint8_t rsv02[112];
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uint8_t rsv03[256];
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struct val_regs dout[9];
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uint8_t rsv04[112];
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struct val_regs din[9];
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uint8_t rsv05[112];
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struct val_regs mode[27];
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uint8_t rsv06[336];
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struct val_regs ies[3];
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struct val_regs smt[3];
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uint8_t rsv07[160];
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struct val_regs tdsel[8];
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struct val_regs rdsel[6];
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uint8_t rsv08[32];
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struct val_regs drv_mode[10];
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uint8_t rsv09[96];
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struct val_regs msdc_rsv0[11];
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struct val_regs msdc2_ctrl5;
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struct val_regs msdc_rsv1[12];
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uint8_t rsv10[64];
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struct val_regs exmd_ctrl[1];
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uint8_t rsv11[48];
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struct val_regs kpad_ctrl[2];
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struct val_regs hsic_ctrl[4];
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};
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check_member(gpio_regs, msdc2_ctrl5, 0xcb0);
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check_member(gpio_regs, hsic_ctrl[3], 0xe50);
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static struct gpio_regs *const mt8173_gpio = (void *)(GPIO_BASE);
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void gpio_set_pull(gpio_t gpio, enum pull_enable enable,
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enum pull_select select);
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void gpio_set_mode(gpio_t gpio, int mode);
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#endif /* SOC_MEDIATEK_MT8173_GPIO_H */
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